
DMA | Direct Memory Access (DMA) enables some peripheral devices to |
| bypass the system processor and communicate directly with the system |
| memory. |
DIMM | Dual Inline Memory Modules are a type of RAM that offer a |
| bus and have separate electrical contacts on each side of the module. |
DIO | The digital inputs and digital outputs are general control signals that |
| control the on/off circuit of external devices or TTL devices. Data can be |
| read or written to the selected address to enable the DIO functions. |
EHCI | The Enhanced Host Controller Interface (EHCI) specification is a |
| |
EIDE | Enhanced IDE (EIDE) is a newer IDE interface standard that has data |
| transfer rates between 4.0 MBps and 16.6 MBps. |
EIST | Enhanced Intel® SpeedStep Technology (EIST) allows users to modify |
| the power consumption levels and processor performance through |
| application software. The application software changes the |
| frequency ratio and the processor core voltage. |
FSB | The Front Side Bus (FSB) is the |
| between the processor and the Northbridge chipset. |
GbE | Gigabit Ethernet (GbE) is an Ethernet version that transfers data at 1.0 |
| Gbps and complies with the IEEE |
GPIO | General purpose input |
HDD | Hard disk drive (HDD) is a type of magnetic, |
| storage device that stores digitally encoded data. |
ICH | The Input/Ouput Controll Hub (ICH) is an Intel® Southbridge chipset. |
IrDA | Infrared Data Association (IrDA) specify infrared data transmission |
| protocols used to enable electronic devices to wirelessly communicate |
| with each other. |
L1 Cache | The Level 1 Cache (L1 Cache) is a small memory cache built into the |
| system processor. |
L2 Cache | The Level 2 Cache (L2 Cache) is an external processor memory cache. |
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