Figure 5-57: Fetch protection override for key-controlled

5.5.2.5eServer 326

eServer 326 systems use AMD Opteron processors. The Opteron processors can either operate in legacy mode to support 32-bit operating systems, or in long mode to support 64-bit operating systems. Long mode has two possible sub modes, the 64-bit mode, which runs only 64-bit applications, and compatibility mode, which can run on both 32-bit and 64-bit applications simultaneously.

In legacy mode, the Opteron processor complies with the x86 architecture described in the System x sections of this document. SLES on eServer 326 uses the compatibility mode of the Opteron processor. The compatibility mode complies with x86-64 architecture, which is an extension of x86 architecture to support

64-bit applications along with legacy 32-bit applications. The following description corresponds to the x86-64 architecture.

This section briefly describes the eServer 326 memory addressing scheme. For more detailed information about the eServer 326 memory management subsystem, see AMD64 Architecture, Programmer’s Manual Volume 2: System Programming, at http://www.amd.com/us- en/assets/content_type/white_papers_and_tech_docs/24593.pdf and “Porting Linux to x86-64”, by Andi Kleen, at http://old.lwn.net/2001/features/OLS/pdf/pdf/x86-64.pdf.

Access control and protection mechanisms are part of both segmentation and paging. The following sections describe the four address types on IBM eServer 326 computers (logical, effective, linear, and physical), and how segmentation and paging are used to provide access control and memory resource separation by SLES on IBM eServer 326 systems.

5.5.2.5.1Logical address

A logical address is a reference into a segmented-address space. It is comprised of the segment selector and the effective address. Notationally, a logical address is represented as

Logical Address = Segment Selector: Offset

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IBM 10 SP1 EAL4 manual EServer, Logical address