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Motorola MC9S12DB128B, MC9S12DJ128B manual 1 Device Memory Map, 2 MC9S12DT128B Memory Map, $0000

Models: MC9S12DT128B

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Figure 1-2 MC9S12DT128B Memory Map

MC9S12DT128B Device User Guide — V01.07

Table 1-1 Device Memory Map

	Address	Module	Size
	Address	Module	(Bytes)
			(Bytes)

		Fixed Flash EEPROM array
	$C000 – $FFFF	incl. 0.5K, 1K, 2K or 4K Protected Sector at end	16384
		and 256 bytes of Vector Space at $FF80 – $FFFF

Figure 1-2 MC9S12DT128B Memory Map

	$0000
	$0400
	$0800
	$1000
	$2000
	$4000
	$8000
	$C000
	$FF00	VECTORS
	$FFFF	VECTORS
	$FFFF
		NORMAL
		SINGLE CHIP

EXT

VECTORS

EXPANDED

VECTORS

SPECIAL

SINGLE CHIP

$0000

$03FF

$0800

$0FFF

$2000

$3FFF

$4000

$7FFF

$8000

$BFFF

$C000

$FFFF

$FF00

$FFFF

1K Register Space

Mappable to any 2K Boundary 2K Bytes EEPROM

Mappable to any 2K Boundary

8K Bytes RAM

Mappable to any 8K Boundary

0.5K, 1K, 2K or 4K Protected Sector

16K Fixed Flash EEPROM

16K Page Window

eight * 16K Flash EEPROM Pages

16K Fixed Flash EEPROM

2K, 4K, 8K or 16K Protected Boot Sector

BDM

(If Active)

The address does not show the map after reset, but a useful map. After reset the map is: $0000 – $03FF: Register Space

$0000 – $1FFF: 8K RAM

$0000 – $07FF: 2K EEPROM (not visible)

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Motorola MC9S12DB128B manual 1 Device Memory Map, 2 MC9S12DT128B Memory Map, 提供单片机解密、IC解密、芯片解密业务 010-62245566, $0000

Contents

MC9S12DG128B, MC9S12DJ128B MC9S12DB128B MC9S12DT128B Device User Guide V01.07 Covers alsoOriginal Release Date 18 June Revised 16 Aug Motorola, Inc 提供单片机解密、IC解密、芯片解密业务 010-62245566DOCUMENT NUMBER 9S12DT128BDGV1/D Revision HistoryVersion RevisionTable of Contents Section 2 Signal DescriptionSection 1 Introduction 2.3.21 PH6 / KWH6 - Port H I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.22 PH5 / KWH5 - Port H I/O Pin 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.23 PH4 / KWH4 - Port H I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.24 PH3 / KWH3 / SS1 - Port H I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.25 PH2 / KWH2 / SCK1 - Port H I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.26 PH1 / KWH1 / MOSI1 - Port H I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.27 PH0 / KWH0 / MISO1 - Port H I/O Pin 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.28 PJ7 / KWJ7 / TXCAN4 / SCL - PORT J I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.29 PJ6 / KWJ6 / RXCAN4 / SDA - PORT J I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.30 PJ10 / KWJ10 - Port J I/O Pins 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.31 PK7 / ECS / ROMCTL - Port K I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.32 PK50 / XADDR1914 - Port K I/O Pins 50 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.33 PM7 / BFPSLM / TXCAN4 - Port M I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.34 PM6 / BFPERR / RXCAN4 - Port M I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.35 PM5 / BFPROK / TXCAN0 / TXCAN4 / SCK0 - Port M I/O Pin 5 . . . . . . . . . . . . .58 2.3.36 PM4 / BFPSYN / RXCAN0 / RXCAN4/ MOSI0 - Port M I/O Pin 4. . . . . . . . . . . . .59 2.3.37 PM3 / TXBF / TXCAN1 / TXCAN0 / SS0 - Port M I/O Pin 3 . . . . . . . . . . . . . . . . .59 2.3.38 PM2 / RXBF / RXCAN1 / RXCAN0 / MISO0 - Port M I/O Pin 2. . . . . . . . . . . . . . .59 2.3.39 PM1 / TXCAN0 / TXB - Port M I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.40 PM0 / RXCAN0 / RXB - Port M I/O Pin 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.41 PP7 / KWP7 / PWM7 - Port P I/O Pin 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.42 PP6 / KWP6 / PWM6 - Port P I/O Pin 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.43 PP5 / KWP5 / PWM5 - Port P I/O Pin 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.44 PP4 / KWP4 / PWM4 - Port P I/O Pin 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.45 PP3 / KWP3 / PWM3 / SS1 - Port P I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.46 PP2 / KWP2 / PWM2 / SCK1 - Port P I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.47 PP1 / KWP1 / PWM1 / MOSI1 - Port P I/O Pin 1. . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.48 PP0 / KWP0 / PWM0 / MISO1 - Port P I/O Pin 0. . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.49 PS7 / SS0 - Port S I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.50 PS6 / SCK0 - Port S I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.51 PS5 / MOSI0 - Port S I/O Pin 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.52 PS4 / MISO0 - Port S I/O Pin 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.53 PS3 / TXD1 - Port S I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.54 PS2 / RXD1 - Port S I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.55 PS1 / TXD0 - Port S I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.56 PS0 / RXD0 - Port S I/O Pin 0 Section 3 System Clock Description Section 5 Resets and InterruptsSection 4 Modes of Operation Section 6 HCS12 Core Block DescriptionSection 7 Clock and Reset Generator CRG Block Description A.1 General A.1.1 Parameter Classification A.1.2 Power Supply7.1 Device-specific information 7.1.1 XCLKS Appendix B Package Information 提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User GuideList of Figures 提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User GuideList of Tables $01C0 - $01FF Reserved Table 0-1 Derivative Differences1 PrefaceTemperature Options Package Option Temperature Option Device Title Controller FamilyMC9S12 DJ128B C FU Package Options FU = 80QFP PV = 112LQFP1.2 Features Section 1 Introduction1.1 Overview Digital filtering Programmable rising or falling edge trigger Memory 1.3 Modes of Operation 1.4 Block Diagram Figure 1-1 shows a block diagram of the MC9S12DT128B device提供单片机解密、IC解密、芯片解密业务 010-62245566 提供单片机解密、IC解密、芯片解密业务 010-62245566 Figure 1-1 MC9S12DT128B Block Diagram1.5 Device Memory Map Table 1-1 Device Memory Map提供单片机解密、IC解密、芯片解密业务 010-62245566 Figure 1-2 MC9S12DT128B Memory Map Table 1-1 Device Memory Map提供单片机解密、IC解密、芯片解密业务 010-62245566 $0000$0000 - $000F 1.5.1 Detailed Register MapMEBI map 1 of 3 Core User Guide $0010 - $0014INT map 1 of 2 Core User Guide $0015 - $0016$0017 - $0017 MMC map 2 of 4 Core User Guide$0028 - $002F $0020 - $0027ReservedBKP Core User Guide $0030 - $0031ECT Enhanced Capture Timer 16 Bit 8 Channels CRG Clock and Reset Generator$0034 - $003F $0040 - $007F$0040 - $007F ECT Enhanced Capture Timer 16 Bit 8 ChannelsMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0040 - $007F ECT Enhanced Capture Timer 16 Bit 8 ChannelsMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0040 - $007F ECT Enhanced Capture Timer 16 Bit 8 Channels$0080 - $009F ATD0 Analog to Digital Converter 10 Bit 8 ChannelATD0 Analog to Digital Converter 10 Bit 8 Channel $0080 - $009F$00A0 - $00C7 PWM Pulse Width Modulator 8 Bit 8 ChannelPWM Pulse Width Modulator 8 Bit 8 Channel $00A0 - $00C7MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566PWM Pulse Width Modulator 8 Bit 8 Channel $00A0 - $00C7SCI0 Asynchronous Serial Interface $00D0 - $00D7SPI0 Serial Peripheral Interface SCI1 Asynchronous Serial Interface$00E0 - $00E7 IIC Inter IC BusBDLC Byte Level Data Link Controller J1850 $00E8 - $00EF$00F0 - $00F7 SPI1 Serial Peripheral InterfaceFlash Control Register fts128k2 $0100 - $010F$0110 - $011B EEPROM Control Register eets2kEEPROM Control Register eets2k $0110 - $011B$011C - $011F Reserved for RAM Control RegisterATD1 Analog to Digital Converter 10 Bit 8 Channel $0120 - $013F$0140 - $017F CAN0 Motorola Scalable CAN - MSCANCAN0 Motorola Scalable CAN - MSCAN $0140 - $017FMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566CAN1 Motorola Scalable CAN - MSCAN $0180 - $01BFMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566CAN1 Motorola Scalable CAN - MSCAN $0180 - $01BF$01C0 - $01FFReserved $0200 - $023FReservedPIM Port Integration Module $0240 - $027FMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566PIM Port Integration Module $0240 - $027FMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566CAN4 Motorola Scalable CAN - MSCAN $0280 - $02BFMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0300 - $035F $02C0 - $02FFReservedByteﬂight MC9S12DT128B Device User GuideByteﬂight $0300 - $035FMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0360 - $03FFReserved 1.6 Part ID AssignmentsTable 1-3 Assigned Part ID Numbers Table 1-4 Memory size registers提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User Guide2.1 Device Pinout Section 2 Signal DescriptionMC9S12DJ128B, MC9S12DB128B Figure 2-1 Pin assignments 112 LQFP for MC9S12DT128B,MC9S12DG128B提供单片机解密、IC解密、芯片解密业务 010-62245566 PAD14/AN14提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User Guide2.2 Signal Properties Summary Signal Properties提供单片机解密、IC解密、芯片解密业务 010-62245566 Pin Name MC9S12DT128B Device User GuideDescription FunctionDescription MC9S12DT128B Device User GuideFunction Function2.3.1 EXTAL, XTAL - Oscillator Pins 2.3 Detailed Signal Descriptions2.3.2 RESET - External Reset Pin 2.3.5 BKGD / TAGHI / MODC - Background Debug, Tag High, and Mode Pin2.3.9 PAD60 / AN060 - Port AD Input Pins 2.3.7 PAD148 / AN160 - Port AD Input Pins2.3.10 PA70 / ADDR158 / DATA158 - Port A I/O Pins 2.3.11 PB70 / ADDR70 / DATA70 - Port B I/O PinsFigure 2-5 Pierce Oscillator Connections PE7=0 Figure 2-4 Colpitts Oscillator Connections PE7=1Figure 2-6 External Clock Connections PE7=0 提供单片机解密、IC解密、芯片解密业务 010-622455662.3.14 PE5 / MODA / IPIPE0 - Port E I/O Pin 2.3.13 PE6 / MODB / IPIPE1 - Port E I/O Pin2.3.15 PE4 / ECLK - Port E I/O Pin 2.3.16 PE3 / LSTRB / TAGLO - Port E I/O Pin2.3.22 PH5 / KWH5 - Port H I/O Pin 2.3.21 PH6 / KWH6 - Port H I/O Pin2.3.23 PH4 / KWH4 - Port H I/O Pin 2.3.24 PH3 / KWH3 / SS1 - Port H I/O Pin2.3.32 PK50 / XADDR1914 - Port K I/O Pins 2.3.30 PJ10 / KWJ10 - Port J I/O Pins2.3.29 PJ6 / KWJ6 / RXCAN4 / SDA - PORT J I/O Pin 2.3.31 PK7 / ECS / ROMCTL - Port K I/O Pin2.3.37 PM3 / TXBF / TXCAN1 / TXCAN0 / SS0 - Port M I/O Pin 2.3.36 PM4 / BFPSYN / RXCAN0 / RXCAN4/ MOSI0 - Port M I/O Pin2.3.38 PM2 / RXBF / RXCAN1 / RXCAN0 / MISO0 - Port M I/O Pin 2.3.39 PM1 / TXCAN0 / TXB - Port M I/O Pin2.3.44 PP4 / KWP4 / PWM4 - Port P I/O Pin 2.3.43 PP5 / KWP5 / PWM5 - Port P I/O Pin2.3.45 PP3 / KWP3 / PWM3 / SS1 - Port P I/O Pin 2.3.46 PP2 / KWP2 / PWM2 / SCK1 - Port P I/O Pin2.3.57 PT70 / IOC70 - Port T I/O Pins 2.4 Power Supply Pins2.3.51 PS5 / MOSI0 - Port S I/O Pin 2.3.52 PS4 / MISO0 - Port S I/O Pin2.4.3 VDD1, VDD2, VSS1, VSS2 - Core Power Pins 2.4.1 VDDX,VSSX - Power & Ground Pins for I/O DriversNOTE All VSS pins must be connected together in the application NOTE No load allowed except for bypass capacitors2.4.5 VRH, VRL - ATD Reference Voltage Input Pins 2.4.4 VDDA, VSSA - Power Supply Pins for ATD and VREG2.4.6 VDDPLL, VSSPLL - Power Supply Pins for PLL 2.4.7 VREGEN - On Chip Voltage Regulator Enable提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User GuideSection 3 System Clock Description 3.1 OverviewFigure 3-1 Clock Connections 提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User GuideSection 4 Modes of Operation 4.2 Chip Configuration Summary4.1 Overview Table 4-1 Mode Selection4.3.1 Securing the Microcontroller 4.3 Security4.3.2 Operation of the Secured Microcontroller 4.3.2.1 Normal Single Chip Mode4.3.3 Unsecuring the Microcontroller 4.4 Low Power Modes4.4.1 Stop 4.4.2 Pseudo Stop提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User Guide5.1 Overview Section 5 Resets and Interrupts5.2 Vectors 5.2.1 Vector Table5.3.1 I/O pins 5.3 Effects of ResetThe RAM array is not automatically initialized out of reset 5.3.2 Memory提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User GuideSection 8 Enhanced Capture Timer ECT Block Description Section 7 Clock and Reset Generator CRG Block DescriptionSection 6 HCS12 Core Block Description Section 9 Analog to Digital Converter ATD Block DescriptionSection 12 Serial Peripheral Interface SPI Block Description DescriptionSection 13 J1850 BDLC Block Description Section 14 Byteflight BF Block DescriptionSection 19 MSCAN Block Description Section 18 RAM Block DescriptionSection 20 Port Integration Module PIM Block Description Section 21 Voltage Regulator VREG Block DescriptionTable 22-1 Suggested External Component Values Section 22 Printed Circuit Board Layout Proposal提供单片机解密、IC解密、芯片解密业务 010-62245566 Figure 22-1 Recommended PCB Layout for 112LQFP Colpitts Oscillator提供单片机解密、IC解密、芯片解密业务 010-62245566 Figure 22-2 Recommended PCB Layout for 80QFP Colpitts OscillatorFigure 22-3 Recommended PCB Layout for 112LQFP Pierce Oscillator 提供单片机解密、IC解密、芯片解密业务 010-62245566C1 VSS1 Figure 22-4 Recommended PCB Layout for 80QFP Pierce Oscillator MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 010-62245566 A.1.2 Power Supply Appendix A Electrical CharacteristicsA.1 General A.1.1 Parameter ClassificationA.1.4 Current Injection A.1.3 PinsA.1.3.1 5V I/O pins VDD is used for VDD1, VDD2 and VDDPLL, VSS is used for VSS1, VSS2 andA.1.5 Absolute Maximum Ratings A.1.6 ESD Protection and Latch-up ImmunityTable A-1 Absolute Maximum Ratings1 A.1.7 Operating Conditions Table A-3 ESD and Latch-Up Protection CharacteristicsTable A-2 ESD and Latch-up Test Conditions A.1.8 Power Dissipation and Thermal Characteristics Table A-4 Operating Conditions提供单片机解密、IC解密、芯片解密业务 010-62245566 The total power dissipation can be calculated from A.1.9 I/O Characteristics Table A-5 Thermal Package Characteristics1提供单片机解密、IC解密、芯片解密业务 010-62245566 Table A-6 5V I/O Characteristics 提供单片机解密、IC解密、芯片解密业务 010-622455662. Refer to Section A.1.4 Current Injection, for more details A.1.10 Supply Currents A.1.10.1 Measurement ConditionsA.1.10.2 Additional Remarks 提供单片机解密、IC解密、芯片解密业务 010-62245566 Table A-7 Supply Current CharacteristicsA.2.1 ATD Operating Characteristics A.2 ATD CharacteristicsA.2.2 Factors influencing accuracy Table A-8 ATD Operating CharacteristicsA.2.2.2 Source capacitance Table A-9 ATD Electrical CharacteristicsA.2.2.3 Current injection ≥ 1024 * C1LSB A.2.3 ATD accuracyINLn = ∑ DNLi = Vn -V0 -n 1LSBFigure A-1 ATD Accuracy Definitions ResolutionVi-1 LSB Vin mVA.3.1 NVM timing A.3 NVM, Flash and EEPROMA.3.1.1 Single Word Programming A.3.1.2 Burst Programmingtcheck ≈ location ⋅ tcyc + 10 ⋅ tcyc t mass ≈Table A-11 NVM Timing Characteristics A.3.1.3 Sector EraseTable A-12 NVM Reliability Characteristics A.3.2 NVM Reliability提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User GuideA.4 Voltage Regulator Table A-13 Voltage Regulator Recommended Load Capacitances提供单片机解密、IC解密、芯片解密业务 010-62245566 提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User GuideA.5.1 Startup A.5 Reset, Oscillator and PLLTable A-14 Startup Characteristics A.5.1.3 External ResetA.5.2 Oscillator A.5.1.5 Pseudo Stop and Wait RecoveryTable A-15 Oscillator Characteristics XFC Pin A.5.3 Phase Locked LoopK V = K 1 ⋅ e KΦ = -ich ⋅ KV→ f C 2 ⋅ ζ ⋅ f refζ = ζ +N ⋅ t nom J N = max ⎜JN = j1 + j N ⋅ t nom提供单片机解密、IC解密、芯片解密业务 010-62245566 Table A-16 PLL CharacteristicsΔtrk ΔLockA.6 MSCAN Table A-17 MSCAN Wake-up Pulse Characteristics提供单片机解密、IC解密、芯片解密业务 010-62245566 提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User GuideA.7 SPI A.7.1 Master ModeFigure A-5 SPI Master Timing CPHA = 提供单片机解密、IC解密、芯片解密业务 010-62245566Figure A-6 SPI Master Timing CPHA =1 Table A-18 SPI Master Mode Timing Characteristics1提供单片机解密、IC解密、芯片解密业务 010-62245566 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSBFigure A-7 SPI Slave Timing CPHA = A.7.2 Slave ModeFigure A-8 SPI Slave Timing CPHA =1 提供单片机解密、IC解密、芯片解密业务 010-62245566Symbol Table A-19 SPI Slave Mode Timing CharacteristicsMC9S12DT128B Device User Guide RatingA.8.1 General Muxed Bus Timing A.8 External Bus TimingFigure A-9 General External Bus Timing MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 010-62245566 提供单片机解密、IC解密、芯片解密业务 010-62245566 Table A-20 Expanded Bus Timing CharacteristicsTable A-20 Expanded Bus Timing Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566tNOH Appendix B Package Information B.1 General提供单片机解密、IC解密、芯片解密业务 010-62245566 B.2 112-pin LQFP package Figure 22-5 112-pin LQFP mechanical dimensions case no提供单片机解密、IC解密、芯片解密业务 010-62245566 B.3 80-pin QFP package Figure 1 80-pin QFP Mechanical Dimensions case no. 841B提供单片机解密、IC解密、芯片解密业务 010-62245566 提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User GuideUser Guide End Sheet MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 010-62245566 FINAL PAGE OF 124 PAGES MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 010-62245566