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Motorola MC9S12DT128B Table A-7 Supply Current Characteristics, 提供单片机解密、IC解密、芯片解密业务 010-62245566

Models: MC9S12DT128B

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Table A-7 Supply Current Characteristics

MC9S12DT128B Device User Guide — V01.07

given. A very good estimate is to take the single chip currents and add the currents due to the external loads.

Table A-7 Supply Current Characteristics

Conditions are shown in Table A-4unless otherwise noted

Num	C	Rating	Symbol	Min	Typ	Max	Unit

1	P	Run supply currents	IDD5				mA
		Single Chip, Internal regulator enabled	IDD5			55
		Wait Supply current
2	P	All modules enabled, PLL on	IDDW			30	mA
	P	only RTI enabled 1				5
		Pseudo Stop Current (RTI and COP disabled) 1, 2
	C	-40°C			370
	P	27°C			400	500
	C	70°C			450
3	C	85°C	IDDPS		550		μA
3	P	"C" Temp Option 100°C	IDDPS		600	1600	μA
	P	"C" Temp Option 100°C			600	1600
	C	105°C			650
	P	"V" Temp Option 120°C			800	2100
	C	125°C			850
	P	“M” Temp Option 140°C			1200	5000

	C	Pseudo Stop Current (RTI and COP enabled) 1, 2			570
	C	-40°C			570
	C	27°C			600
4	C	70°C	IDDPS		650		μA
4	C	85°C	IDDPS		750		μA
	C	85°C			750
	C	105°C			850
	C	125°C			1200
	C	140°C			1500

	C	Stop Current 2			12
	C	-40°C			12
	P	27°C			25	100
	C	70°C			100
5	C	85°C	IDDS		130		μA
5	P	"C" Temp Option 100°C	IDDS		160	1200	μA
	P	"C" Temp Option 100°C			160	1200
	C	105°C			200
	P	"V" Temp Option 120°C			350	1700
	C	125°C			400
	P	“M” Temp Option 140°C			600	5000

NOTES:

1.PLL off, Oscillator in Colpitts Mode

2.At those low power dissipation levels TJ = TA can be assumed

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Motorola MC9S12DT128B, MC9S12DB128B manual Table A-7 Supply Current Characteristics, 提供单片机解密、IC解密、芯片解密业务 010-62245566

Contents

MC9S12DT128B Device User Guide V01.07 Covers also MC9S12DG128B, MC9S12DJ128B MC9S12DB128BOriginal Release Date 18 June Revised 16 Aug Motorola, Inc 提供单片机解密、IC解密、芯片解密业务 010-62245566Revision History DOCUMENT NUMBER 9S12DT128BDGV1/DVersion RevisionSection 1 Introduction Table of ContentsSection 2 Signal Description 2.3.21 PH6 / KWH6 - Port H I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.22 PH5 / KWH5 - Port H I/O Pin 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.23 PH4 / KWH4 - Port H I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.24 PH3 / KWH3 / SS1 - Port H I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.25 PH2 / KWH2 / SCK1 - Port H I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.26 PH1 / KWH1 / MOSI1 - Port H I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.27 PH0 / KWH0 / MISO1 - Port H I/O Pin 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.28 PJ7 / KWJ7 / TXCAN4 / SCL - PORT J I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.29 PJ6 / KWJ6 / RXCAN4 / SDA - PORT J I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.30 PJ10 / KWJ10 - Port J I/O Pins 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.31 PK7 / ECS / ROMCTL - Port K I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.32 PK50 / XADDR1914 - Port K I/O Pins 50 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.33 PM7 / BFPSLM / TXCAN4 - Port M I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.34 PM6 / BFPERR / RXCAN4 - Port M I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.35 PM5 / BFPROK / TXCAN0 / TXCAN4 / SCK0 - Port M I/O Pin 5 . . . . . . . . . . . . .58 2.3.36 PM4 / BFPSYN / RXCAN0 / RXCAN4/ MOSI0 - Port M I/O Pin 4. . . . . . . . . . . . .59 2.3.37 PM3 / TXBF / TXCAN1 / TXCAN0 / SS0 - Port M I/O Pin 3 . . . . . . . . . . . . . . . . .59 2.3.38 PM2 / RXBF / RXCAN1 / RXCAN0 / MISO0 - Port M I/O Pin 2. . . . . . . . . . . . . . .59 2.3.39 PM1 / TXCAN0 / TXB - Port M I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.40 PM0 / RXCAN0 / RXB - Port M I/O Pin 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.41 PP7 / KWP7 / PWM7 - Port P I/O Pin 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.42 PP6 / KWP6 / PWM6 - Port P I/O Pin 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.43 PP5 / KWP5 / PWM5 - Port P I/O Pin 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.44 PP4 / KWP4 / PWM4 - Port P I/O Pin 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.45 PP3 / KWP3 / PWM3 / SS1 - Port P I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.46 PP2 / KWP2 / PWM2 / SCK1 - Port P I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.47 PP1 / KWP1 / PWM1 / MOSI1 - Port P I/O Pin 1. . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.48 PP0 / KWP0 / PWM0 / MISO1 - Port P I/O Pin 0. . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.49 PS7 / SS0 - Port S I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.50 PS6 / SCK0 - Port S I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.51 PS5 / MOSI0 - Port S I/O Pin 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.52 PS4 / MISO0 - Port S I/O Pin 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.53 PS3 / TXD1 - Port S I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.54 PS2 / RXD1 - Port S I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.55 PS1 / TXD0 - Port S I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.56 PS0 / RXD0 - Port S I/O Pin 0 Section 5 Resets and Interrupts Section 3 System Clock DescriptionSection 4 Modes of Operation Section 6 HCS12 Core Block Description7.1 Device-specific information 7.1.1 XCLKS Section 7 Clock and Reset Generator CRG Block DescriptionA.1 General A.1.1 Parameter Classification A.1.2 Power Supply Appendix B Package Information MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566List of Figures MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566List of Tables $01C0 - $01FF Reserved Preface Table 0-1 Derivative Differences1Package Option Temperature Option Device Title Controller Family Temperature OptionsMC9S12 DJ128B C FU Package Options FU = 80QFP PV = 112LQFP1.1 Overview 1.2 FeaturesSection 1 Introduction Digital filtering Programmable rising or falling edge trigger Memory 1.3 Modes of Operation 提供单片机解密、IC解密、芯片解密业务 010-62245566 1.4 Block DiagramFigure 1-1 shows a block diagram of the MC9S12DT128B device Figure 1-1 MC9S12DT128B Block Diagram 提供单片机解密、IC解密、芯片解密业务 010-62245566提供单片机解密、IC解密、芯片解密业务 010-62245566 1.5 Device Memory MapTable 1-1 Device Memory Map Table 1-1 Device Memory Map Figure 1-2 MC9S12DT128B Memory Map提供单片机解密、IC解密、芯片解密业务 010-62245566 $00001.5.1 Detailed Register Map $0000 - $000FMEBI map 1 of 3 Core User Guide $0010 - $0014$0015 - $0016 INT map 1 of 2 Core User Guide$0017 - $0017 MMC map 2 of 4 Core User Guide$0020 - $0027Reserved $0028 - $002FBKP Core User Guide $0030 - $0031CRG Clock and Reset Generator ECT Enhanced Capture Timer 16 Bit 8 Channels$0034 - $003F $0040 - $007FECT Enhanced Capture Timer 16 Bit 8 Channels $0040 - $007FMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566ECT Enhanced Capture Timer 16 Bit 8 Channels $0040 - $007FMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566ECT Enhanced Capture Timer 16 Bit 8 Channels $0040 - $007F$0080 - $009F ATD0 Analog to Digital Converter 10 Bit 8 Channel$0080 - $009F ATD0 Analog to Digital Converter 10 Bit 8 Channel$00A0 - $00C7 PWM Pulse Width Modulator 8 Bit 8 Channel$00A0 - $00C7 PWM Pulse Width Modulator 8 Bit 8 ChannelMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$00A0 - $00C7 PWM Pulse Width Modulator 8 Bit 8 ChannelSCI0 Asynchronous Serial Interface $00D0 - $00D7SCI1 Asynchronous Serial Interface SPI0 Serial Peripheral Interface$00E0 - $00E7 IIC Inter IC Bus$00E8 - $00EF BDLC Byte Level Data Link Controller J1850$00F0 - $00F7 SPI1 Serial Peripheral Interface$0100 - $010F Flash Control Register fts128k2$0110 - $011B EEPROM Control Register eets2k$0110 - $011B EEPROM Control Register eets2k$011C - $011F Reserved for RAM Control Register$0120 - $013F ATD1 Analog to Digital Converter 10 Bit 8 Channel$0140 - $017F CAN0 Motorola Scalable CAN - MSCAN$0140 - $017F CAN0 Motorola Scalable CAN - MSCANMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0180 - $01BF CAN1 Motorola Scalable CAN - MSCANMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0180 - $01BF CAN1 Motorola Scalable CAN - MSCAN$01C0 - $01FFReserved $0200 - $023FReserved$0240 - $027F PIM Port Integration ModuleMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0240 - $027F PIM Port Integration ModuleMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0280 - $02BF CAN4 Motorola Scalable CAN - MSCANMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$02C0 - $02FFReserved $0300 - $035FByteﬂight MC9S12DT128B Device User Guide$0300 - $035F ByteﬂightMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-622455661.6 Part ID Assignments $0360 - $03FFReservedTable 1-3 Assigned Part ID Numbers Table 1-4 Memory size registersMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Section 2 Signal Description 2.1 Device PinoutFigure 2-1 Pin assignments 112 LQFP for MC9S12DT128B,MC9S12DG128B MC9S12DJ128B, MC9S12DB128B提供单片机解密、IC解密、芯片解密业务 010-62245566 PAD14/AN14MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566提供单片机解密、IC解密、芯片解密业务 010-62245566 2.2 Signal Properties SummarySignal Properties MC9S12DT128B Device User Guide Pin NameDescription FunctionMC9S12DT128B Device User Guide DescriptionFunction Function2.3 Detailed Signal Descriptions 2.3.1 EXTAL, XTAL - Oscillator Pins2.3.2 RESET - External Reset Pin 2.3.5 BKGD / TAGHI / MODC - Background Debug, Tag High, and Mode Pin2.3.7 PAD148 / AN160 - Port AD Input Pins 2.3.9 PAD60 / AN060 - Port AD Input Pins2.3.10 PA70 / ADDR158 / DATA158 - Port A I/O Pins 2.3.11 PB70 / ADDR70 / DATA70 - Port B I/O PinsFigure 2-4 Colpitts Oscillator Connections PE7=1 Figure 2-5 Pierce Oscillator Connections PE7=0Figure 2-6 External Clock Connections PE7=0 提供单片机解密、IC解密、芯片解密业务 010-622455662.3.13 PE6 / MODB / IPIPE1 - Port E I/O Pin 2.3.14 PE5 / MODA / IPIPE0 - Port E I/O Pin2.3.15 PE4 / ECLK - Port E I/O Pin 2.3.16 PE3 / LSTRB / TAGLO - Port E I/O Pin2.3.21 PH6 / KWH6 - Port H I/O Pin 2.3.22 PH5 / KWH5 - Port H I/O Pin2.3.23 PH4 / KWH4 - Port H I/O Pin 2.3.24 PH3 / KWH3 / SS1 - Port H I/O Pin2.3.30 PJ10 / KWJ10 - Port J I/O Pins 2.3.32 PK50 / XADDR1914 - Port K I/O Pins2.3.29 PJ6 / KWJ6 / RXCAN4 / SDA - PORT J I/O Pin 2.3.31 PK7 / ECS / ROMCTL - Port K I/O Pin2.3.36 PM4 / BFPSYN / RXCAN0 / RXCAN4/ MOSI0 - Port M I/O Pin 2.3.37 PM3 / TXBF / TXCAN1 / TXCAN0 / SS0 - Port M I/O Pin2.3.38 PM2 / RXBF / RXCAN1 / RXCAN0 / MISO0 - Port M I/O Pin 2.3.39 PM1 / TXCAN0 / TXB - Port M I/O Pin2.3.43 PP5 / KWP5 / PWM5 - Port P I/O Pin 2.3.44 PP4 / KWP4 / PWM4 - Port P I/O Pin2.3.45 PP3 / KWP3 / PWM3 / SS1 - Port P I/O Pin 2.3.46 PP2 / KWP2 / PWM2 / SCK1 - Port P I/O Pin2.4 Power Supply Pins 2.3.57 PT70 / IOC70 - Port T I/O Pins2.3.51 PS5 / MOSI0 - Port S I/O Pin 2.3.52 PS4 / MISO0 - Port S I/O Pin2.4.1 VDDX,VSSX - Power & Ground Pins for I/O Drivers 2.4.3 VDD1, VDD2, VSS1, VSS2 - Core Power PinsNOTE All VSS pins must be connected together in the application NOTE No load allowed except for bypass capacitors2.4.4 VDDA, VSSA - Power Supply Pins for ATD and VREG 2.4.5 VRH, VRL - ATD Reference Voltage Input Pins2.4.6 VDDPLL, VSSPLL - Power Supply Pins for PLL 2.4.7 VREGEN - On Chip Voltage Regulator EnableMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Figure 3-1 Clock Connections Section 3 System Clock Description3.1 Overview MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-622455664.2 Chip Configuration Summary Section 4 Modes of Operation4.1 Overview Table 4-1 Mode Selection4.3 Security 4.3.1 Securing the Microcontroller4.3.2 Operation of the Secured Microcontroller 4.3.2.1 Normal Single Chip Mode4.4 Low Power Modes 4.3.3 Unsecuring the Microcontroller4.4.1 Stop 4.4.2 Pseudo StopMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Section 5 Resets and Interrupts 5.1 Overview5.2 Vectors 5.2.1 Vector Table5.3 Effects of Reset 5.3.1 I/O pins5.3.2 Memory The RAM array is not automatically initialized out of resetMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Section 7 Clock and Reset Generator CRG Block Description Section 8 Enhanced Capture Timer ECT Block DescriptionSection 6 HCS12 Core Block Description Section 9 Analog to Digital Converter ATD Block DescriptionDescription Section 12 Serial Peripheral Interface SPI Block DescriptionSection 13 J1850 BDLC Block Description Section 14 Byteflight BF Block DescriptionSection 18 RAM Block Description Section 19 MSCAN Block DescriptionSection 20 Port Integration Module PIM Block Description Section 21 Voltage Regulator VREG Block DescriptionSection 22 Printed Circuit Board Layout Proposal Table 22-1 Suggested External Component ValuesFigure 22-1 Recommended PCB Layout for 112LQFP Colpitts Oscillator 提供单片机解密、IC解密、芯片解密业务 010-62245566Figure 22-2 Recommended PCB Layout for 80QFP Colpitts Oscillator 提供单片机解密、IC解密、芯片解密业务 010-62245566C1 VSS1 Figure 22-3 Recommended PCB Layout for 112LQFP Pierce Oscillator提供单片机解密、IC解密、芯片解密业务 010-62245566 提供单片机解密、IC解密、芯片解密业务 010-62245566 Figure 22-4 Recommended PCB Layout for 80QFP Pierce OscillatorMC9S12DT128B Device User Guide Appendix A Electrical Characteristics A.1.2 Power SupplyA.1 General A.1.1 Parameter ClassificationA.1.3 Pins A.1.4 Current InjectionA.1.3.1 5V I/O pins VDD is used for VDD1, VDD2 and VDDPLL, VSS is used for VSS1, VSS2 andTable A-1 Absolute Maximum Ratings1 A.1.5 Absolute Maximum RatingsA.1.6 ESD Protection and Latch-up Immunity Table A-2 ESD and Latch-up Test Conditions A.1.7 Operating ConditionsTable A-3 ESD and Latch-Up Protection Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566 A.1.8 Power Dissipation and Thermal CharacteristicsTable A-4 Operating Conditions The total power dissipation can be calculated from 提供单片机解密、IC解密、芯片解密业务 010-62245566 A.1.9 I/O CharacteristicsTable A-5 Thermal Package Characteristics1 2. Refer to Section A.1.4 Current Injection, for more details Table A-6 5V I/O Characteristics提供单片机解密、IC解密、芯片解密业务 010-62245566 A.1.10.2 Additional Remarks A.1.10 Supply CurrentsA.1.10.1 Measurement Conditions Table A-7 Supply Current Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566A.2 ATD Characteristics A.2.1 ATD Operating CharacteristicsA.2.2 Factors influencing accuracy Table A-8 ATD Operating CharacteristicsTable A-9 ATD Electrical Characteristics A.2.2.2 Source capacitanceA.2.2.3 Current injection ≥ 1024 * CA.2.3 ATD accuracy 1LSBINLn = ∑ DNLi = Vn -V0 -n 1LSBResolution Figure A-1 ATD Accuracy DefinitionsVi-1 LSB Vin mVA.3 NVM, Flash and EEPROM A.3.1 NVM timingA.3.1.1 Single Word Programming A.3.1.2 Burst Programmingt mass ≈ tcheck ≈ location ⋅ tcyc + 10 ⋅ tcycTable A-11 NVM Timing Characteristics A.3.1.3 Sector EraseA.3.2 NVM Reliability Table A-12 NVM Reliability CharacteristicsMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566提供单片机解密、IC解密、芯片解密业务 010-62245566 A.4 Voltage RegulatorTable A-13 Voltage Regulator Recommended Load Capacitances MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566A.5 Reset, Oscillator and PLL A.5.1 StartupTable A-14 Startup Characteristics A.5.1.3 External ResetTable A-15 Oscillator Characteristics A.5.2 OscillatorA.5.1.5 Pseudo Stop and Wait Recovery A.5.3 Phase Locked Loop XFC PinK V = K 1 ⋅ e KΦ = -ich ⋅ KV2 ⋅ ζ ⋅ f ref → f Cζ = ζ +J N = max ⎜ N ⋅ t nomJN = j1 + j N ⋅ t nomTable A-16 PLL Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566Δtrk ΔLock提供单片机解密、IC解密、芯片解密业务 010-62245566 A.6 MSCANTable A-17 MSCAN Wake-up Pulse Characteristics MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566A.7.1 Master Mode A.7 SPIFigure A-5 SPI Master Timing CPHA = 提供单片机解密、IC解密、芯片解密业务 010-62245566Table A-18 SPI Master Mode Timing Characteristics1 Figure A-6 SPI Master Timing CPHA =1提供单片机解密、IC解密、芯片解密业务 010-62245566 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSBA.7.2 Slave Mode Figure A-7 SPI Slave Timing CPHA =Figure A-8 SPI Slave Timing CPHA =1 提供单片机解密、IC解密、芯片解密业务 010-62245566Table A-19 SPI Slave Mode Timing Characteristics SymbolMC9S12DT128B Device User Guide RatingA.8 External Bus Timing A.8.1 General Muxed Bus Timing提供单片机解密、IC解密、芯片解密业务 010-62245566 Figure A-9 General External Bus TimingMC9S12DT128B Device User Guide Table A-20 Expanded Bus Timing Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566tNOH Table A-20 Expanded Bus Timing Characteristics提供单片机解密、IC解密、芯片解密业务 010-62245566 提供单片机解密、IC解密、芯片解密业务 010-62245566 Appendix B Package InformationB.1 General 提供单片机解密、IC解密、芯片解密业务 010-62245566 B.2 112-pin LQFP packageFigure 22-5 112-pin LQFP mechanical dimensions case no 提供单片机解密、IC解密、芯片解密业务 010-62245566 B.3 80-pin QFP packageFigure 1 80-pin QFP Mechanical Dimensions case no. 841B MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566提供单片机解密、IC解密、芯片解密业务 010-62245566 User Guide End SheetMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566 FINAL PAGE OF 124 PAGESMC9S12DT128B Device User Guide