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Motorola MC9S12DT128B, MC9S12DB128B, MC9S12DJ128B, MC9S12DG128B Effects of Reset, 5.3.1 I/O pins

Models: MC9S12DT128B

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5.3 Effects of Reset

MC9S12DT128B Device User Guide — V01.07

$FFC8, $FFC9	Pulse Accumulator B Overﬂow	I-Bit	PBCTL (PBOVI)	$C8

$FFC6, $FFC7	CRG PLL lock	I-Bit	PLLCR (LOCKIE)	$C6

$FFC4, $FFC5	CRG Self Clock Mode	I-Bit	PLLCR (SCMIE)	$C4

$FFC2, $FFC3	BDLC	I-Bit	DLCBCR1 (IE)	$C2

$FFC0, $FFC1	IIC Bus	I-Bit	IBCR (IBIE)	$C0

$FFBE, $FFBF	SPI1	I-Bit	SP1CR1 (SPIE, SPTIE)	$BE

$FFBC, $FFBD		Reserved
$FFBA, $FFBB	EEPROM	I-Bit	ECNFG (CCIE, CBEIE)	$BA

$FFB8, $FFB9	FLASH	I-Bit	FCNFG (CCIE, CBEIE)	$B8

$FFB6, $FFB7	CAN0 wake-up	I-Bit	CAN0RIER (WUPIE)	$B6

$FFB4, $FFB5	CAN0 errors	I-Bit	CAN0RIER (CSCIE, OVRIE)	$B4

$FFB2, $FFB3	CAN0 receive	I-Bit	CAN0RIER (RXFIE)	$B2

$FFB0, $FFB1	CAN0 transmit	I-Bit	CAN0TIER (TXEIE[2:0])	$B0

$FFAE, $FFAF	CAN1 wake-up	I-Bit	CAN1RIER (WUPIE)	$AE

$FFAC, $FFAD	CAN1 errors	I-Bit	CAN1RIER (CSCIE, OVRIE)	$AC

$FFAA, $FFAB	CAN1 receive	I-Bit	CAN1RIER (RXFIE)	$AA

$FFA8, $FFA9	CAN1 transmit	I-Bit	CAN1TIER (TXEIE[2:0])	$A8

$FFA6, $FFA7	BF Rx FIFO not empty	I-Bit	BFRIER (RCVFIE)	$A6

$FFA4, $FFA5	BF receive	I-Bit	BFBUFCTL[15:0] (IENA)	$A4

$FFA2, $FFA3	BF Synchronisation	I-Bit	BFRIER (SYNAIE, SYNNIE)	$A2

			BFBUFCTL[15:0] (IENA),
			BFGIER (OVRNIE, ERRIE,
$FFA0, $FFA1	BF general	I-Bit	SYNEIE, SYNLIE, ILLPIE,	$A0
			LOCKIE, WAKEIE)
			BFRIER (SLMMIE)

$FF98, $FF9F		Reserved
$FF96, $FF97	CAN4 wake-up	I-Bit	CAN4RIER (WUPIE)	$96

$FF94, $FF95	CAN4 errors	I-Bit	CAN4RIER (CSCIE, OVRIE)	$94

$FF92, $FF93	CAN4 receive	I-Bit	CAN4RIER (RXFIE)	$92

$FF90, $FF91	CAN4 transmit	I-Bit	CAN4TIER (TXEIE[2:0])	$90

$FF8E, $FF8F	Port P Interrupt	I-Bit	PTPIF (PIEP)	$8E

$FF8C, $FF8D	PWM Emergency Shutdown	I-Bit	PWMSDN (PWMIE)	$8C

$FF80 to		Reserved
$FF8B		Reserved
$FF8B

5.3 Effects of Reset

When a reset occurs, MCU registers and control bits are changed to known start-up states. Refer to the respective module Block User Guides for register reset states.

5.3.1 I/O pins

Refer to the HCS12 Core User Guides for mode dependent pin configuration of port A, B, E and K out of reset.

Refer to the PIM Block User Guide for reset configurations of all peripheral module ports.

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Motorola MC9S12DT128B, MC9S12DB128B, MC9S12DJ128B, MC9S12DG128B manual Effects of Reset, 5.3.1 I/O pins

Contents

MC9S12DT128B Device User Guide V01.07 Covers also MC9S12DG128B, MC9S12DJ128B MC9S12DB128BOriginal Release Date 18 June Revised 16 Aug Motorola, Inc 提供单片机解密、IC解密、芯片解密业务 010-62245566Revision History DOCUMENT NUMBER 9S12DT128BDGV1/DVersion RevisionTable of Contents Section 2 Signal DescriptionSection 1 Introduction 2.3.21 PH6 / KWH6 - Port H I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.22 PH5 / KWH5 - Port H I/O Pin 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.23 PH4 / KWH4 - Port H I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.24 PH3 / KWH3 / SS1 - Port H I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.25 PH2 / KWH2 / SCK1 - Port H I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.26 PH1 / KWH1 / MOSI1 - Port H I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.27 PH0 / KWH0 / MISO1 - Port H I/O Pin 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.28 PJ7 / KWJ7 / TXCAN4 / SCL - PORT J I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.29 PJ6 / KWJ6 / RXCAN4 / SDA - PORT J I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.30 PJ10 / KWJ10 - Port J I/O Pins 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.31 PK7 / ECS / ROMCTL - Port K I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.32 PK50 / XADDR1914 - Port K I/O Pins 50 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.33 PM7 / BFPSLM / TXCAN4 - Port M I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.34 PM6 / BFPERR / RXCAN4 - Port M I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.35 PM5 / BFPROK / TXCAN0 / TXCAN4 / SCK0 - Port M I/O Pin 5 . . . . . . . . . . . . .58 2.3.36 PM4 / BFPSYN / RXCAN0 / RXCAN4/ MOSI0 - Port M I/O Pin 4. . . . . . . . . . . . .59 2.3.37 PM3 / TXBF / TXCAN1 / TXCAN0 / SS0 - Port M I/O Pin 3 . . . . . . . . . . . . . . . . .59 2.3.38 PM2 / RXBF / RXCAN1 / RXCAN0 / MISO0 - Port M I/O Pin 2. . . . . . . . . . . . . . .59 2.3.39 PM1 / TXCAN0 / TXB - Port M I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.40 PM0 / RXCAN0 / RXB - Port M I/O Pin 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.41 PP7 / KWP7 / PWM7 - Port P I/O Pin 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.42 PP6 / KWP6 / PWM6 - Port P I/O Pin 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.43 PP5 / KWP5 / PWM5 - Port P I/O Pin 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.44 PP4 / KWP4 / PWM4 - Port P I/O Pin 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.45 PP3 / KWP3 / PWM3 / SS1 - Port P I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.46 PP2 / KWP2 / PWM2 / SCK1 - Port P I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.47 PP1 / KWP1 / PWM1 / MOSI1 - Port P I/O Pin 1. . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.48 PP0 / KWP0 / PWM0 / MISO1 - Port P I/O Pin 0. . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.49 PS7 / SS0 - Port S I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.50 PS6 / SCK0 - Port S I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.51 PS5 / MOSI0 - Port S I/O Pin 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.52 PS4 / MISO0 - Port S I/O Pin 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.53 PS3 / TXD1 - Port S I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.54 PS2 / RXD1 - Port S I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.55 PS1 / TXD0 - Port S I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.56 PS0 / RXD0 - Port S I/O Pin 0 Section 5 Resets and Interrupts Section 3 System Clock DescriptionSection 4 Modes of Operation Section 6 HCS12 Core Block DescriptionSection 7 Clock and Reset Generator CRG Block Description A.1 General A.1.1 Parameter Classification A.1.2 Power Supply7.1 Device-specific information 7.1.1 XCLKS Appendix B Package Information MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566List of Figures MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566List of Tables $01C0 - $01FF Reserved Preface Table 0-1 Derivative Differences1MC9S12 DJ128B C FU Package Option Temperature Option Device Title Controller FamilyTemperature Options Package Options FU = 80QFP PV = 112LQFP1.2 Features Section 1 Introduction1.1 Overview Digital filtering Programmable rising or falling edge trigger Memory 1.3 Modes of Operation 1.4 Block Diagram Figure 1-1 shows a block diagram of the MC9S12DT128B device提供单片机解密、IC解密、芯片解密业务 010-62245566 Figure 1-1 MC9S12DT128B Block Diagram 提供单片机解密、IC解密、芯片解密业务 010-622455661.5 Device Memory Map Table 1-1 Device Memory Map提供单片机解密、IC解密、芯片解密业务 010-62245566 Table 1-1 Device Memory Map Figure 1-2 MC9S12DT128B Memory Map提供单片机解密、IC解密、芯片解密业务 010-62245566 $00001.5.1 Detailed Register Map $0000 - $000FMEBI map 1 of 3 Core User Guide $0010 - $0014$0015 - $0016 INT map 1 of 2 Core User Guide$0017 - $0017 MMC map 2 of 4 Core User Guide$0020 - $0027Reserved $0028 - $002FBKP Core User Guide $0030 - $0031CRG Clock and Reset Generator ECT Enhanced Capture Timer 16 Bit 8 Channels$0034 - $003F $0040 - $007FECT Enhanced Capture Timer 16 Bit 8 Channels $0040 - $007FMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566ECT Enhanced Capture Timer 16 Bit 8 Channels $0040 - $007FMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566ECT Enhanced Capture Timer 16 Bit 8 Channels $0040 - $007F$0080 - $009F ATD0 Analog to Digital Converter 10 Bit 8 Channel$0080 - $009F ATD0 Analog to Digital Converter 10 Bit 8 Channel$00A0 - $00C7 PWM Pulse Width Modulator 8 Bit 8 Channel$00A0 - $00C7 PWM Pulse Width Modulator 8 Bit 8 ChannelMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$00A0 - $00C7 PWM Pulse Width Modulator 8 Bit 8 ChannelSCI0 Asynchronous Serial Interface $00D0 - $00D7SCI1 Asynchronous Serial Interface SPI0 Serial Peripheral Interface$00E0 - $00E7 IIC Inter IC Bus$00E8 - $00EF BDLC Byte Level Data Link Controller J1850$00F0 - $00F7 SPI1 Serial Peripheral Interface$0100 - $010F Flash Control Register fts128k2$0110 - $011B EEPROM Control Register eets2k$0110 - $011B EEPROM Control Register eets2k$011C - $011F Reserved for RAM Control Register$0120 - $013F ATD1 Analog to Digital Converter 10 Bit 8 Channel$0140 - $017F CAN0 Motorola Scalable CAN - MSCAN$0140 - $017F CAN0 Motorola Scalable CAN - MSCANMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0180 - $01BF CAN1 Motorola Scalable CAN - MSCANMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0180 - $01BF CAN1 Motorola Scalable CAN - MSCAN$01C0 - $01FFReserved $0200 - $023FReserved$0240 - $027F PIM Port Integration ModuleMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0240 - $027F PIM Port Integration ModuleMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$0280 - $02BF CAN4 Motorola Scalable CAN - MSCANMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566$02C0 - $02FFReserved $0300 - $035FByteﬂight MC9S12DT128B Device User Guide$0300 - $035F ByteﬂightMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-622455661.6 Part ID Assignments $0360 - $03FFReservedTable 1-3 Assigned Part ID Numbers Table 1-4 Memory size registersMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Section 2 Signal Description 2.1 Device PinoutFigure 2-1 Pin assignments 112 LQFP for MC9S12DT128B,MC9S12DG128B MC9S12DJ128B, MC9S12DB128B提供单片机解密、IC解密、芯片解密业务 PAD14/AN14MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-622455662.2 Signal Properties Summary Signal Properties提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User Guide Pin NameDescription FunctionMC9S12DT128B Device User Guide DescriptionFunction Function2.3 Detailed Signal Descriptions 2.3.1 EXTAL, XTAL - Oscillator Pins2.3.2 RESET - External Reset Pin 2.3.3 TEST - Test Pin2.3.7 PAD148 / AN160 - Port AD Input Pins 2.3.9 PAD60 / AN060 - Port AD Input Pins2.3.10 PA70 / ADDR158 / DATA158 - Port A I/O Pins 2.3.11 PB70 / ADDR70 / DATA70 - Port B I/O PinsFigure 2-4 Colpitts Oscillator Connections PE7=1 Figure 2-5 Pierce Oscillator Connections PE7=0Figure 2-6 External Clock Connections PE7=0 提供单片机解密、IC解密、芯片解密业务 010-622455662.3.13 PE6 / MODB / IPIPE1 - Port E I/O Pin 2.3.14 PE5 / MODA / IPIPE0 - Port E I/O Pin2.3.15 PE4 / ECLK - Port E I/O Pin 2.3.16 PE3 / LSTRB / TAGLO - Port E I/O Pin2.3.21 PH6 / KWH6 - Port H I/O Pin 2.3.22 PH5 / KWH5 - Port H I/O Pin2.3.23 PH4 / KWH4 - Port H I/O Pin 2.3.24 PH3 / KWH3 / SS1 - Port H I/O Pin2.3.30 PJ10 / KWJ10 - Port J I/O Pins 2.3.32 PK50 / XADDR1914 - Port K I/O Pins2.3.29 PJ6 / KWJ6 / RXCAN4 / SDA - PORT J I/O Pin 2.3.31 PK7 / ECS / ROMCTL - Port K I/O Pin2.3.36 PM4 / BFPSYN / RXCAN0 / RXCAN4/ MOSI0 - Port M I/O Pin 2.3.37 PM3 / TXBF / TXCAN1 / TXCAN0 / SS0 - Port M I/O Pin2.3.38 PM2 / RXBF / RXCAN1 / RXCAN0 / MISO0 - Port M I/O Pin 2.3.39 PM1 / TXCAN0 / TXB - Port M I/O Pin2.3.43 PP5 / KWP5 / PWM5 - Port P I/O Pin 2.3.44 PP4 / KWP4 / PWM4 - Port P I/O Pin2.3.45 PP3 / KWP3 / PWM3 / SS1 - Port P I/O Pin 2.3.46 PP2 / KWP2 / PWM2 / SCK1 - Port P I/O Pin2.4 Power Supply Pins 2.3.57 PT70 / IOC70 - Port T I/O Pins2.3.51 PS5 / MOSI0 - Port S I/O Pin 2.3.52 PS4 / MISO0 - Port S I/O Pin2.4.1 VDDX,VSSX - Power & Ground Pins for I/O Drivers 2.4.3 VDD1, VDD2, VSS1, VSS2 - Core Power PinsNOTE All VSS pins must be connected together in the application NOTE No load allowed except for bypass capacitors2.4.4 VDDA, VSSA - Power Supply Pins for ATD and VREG 2.4.5 VRH, VRL - ATD Reference Voltage Input Pins2.4.6 VDDPLL, VSSPLL - Power Supply Pins for PLL 2.4.7 VREGEN - On Chip Voltage Regulator EnableMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Section 3 System Clock Description 3.1 OverviewFigure 3-1 Clock Connections MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-622455664.2 Chip Configuration Summary Section 4 Modes of Operation4.1 Overview Table 4-1 Mode Selection4.3 Security 4.3.1 Securing the Microcontroller4.3.2 Operation of the Secured Microcontroller Table 4-3 Voltage Regulator VREGEN4.4 Low Power Modes 4.3.3 Unsecuring the Microcontroller4.4.1 Stop 4.4.2 Pseudo StopMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Section 5 Resets and Interrupts 5.1 Overview5.2 Vectors 5.2.1 Vector Table5.3 Effects of Reset 5.3.1 I/O pins5.3.2 Memory The RAM array is not automatically initialized out of resetMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Section 7 Clock and Reset Generator CRG Block Description Section 8 Enhanced Capture Timer ECT Block DescriptionSection 6 HCS12 Core Block Description Section 9 Analog to Digital Converter ATD Block DescriptionDescription Section 12 Serial Peripheral Interface SPI Block DescriptionSection 13 J1850 BDLC Block Description Section 14 Byteflight BF Block DescriptionSection 18 RAM Block Description Section 19 MSCAN Block DescriptionSection 20 Port Integration Module PIM Block Description Section 21 Voltage Regulator VREG Block DescriptionSection 22 Printed Circuit Board Layout Proposal Table 22-1 Suggested External Component ValuesFigure 22-1 Recommended PCB Layout for 112LQFP Colpitts Oscillator 提供单片机解密、IC解密、芯片解密业务 010-62245566Figure 22-2 Recommended PCB Layout for 80QFP Colpitts Oscillator 提供单片机解密、IC解密、芯片解密业务 010-62245566Figure 22-3 Recommended PCB Layout for 112LQFP Pierce Oscillator 提供单片机解密、IC解密、芯片解密业务 010-62245566C1 VSS1 Figure 22-4 Recommended PCB Layout for 80QFP Pierce Oscillator MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 010-62245566 Appendix A Electrical Characteristics A.1.2 Power SupplyA.1 General A.1.1 Parameter ClassificationA.1.3 Pins A.1.4 Current InjectionA.1.3.1 5V I/O pins VDD is used for VDD1, VDD2 and VDDPLL, VSS is used for VSS1, VSS2 andA.1.5 Absolute Maximum Ratings A.1.6 ESD Protection and Latch-up ImmunityTable A-1 Absolute Maximum Ratings1 A.1.7 Operating Conditions Table A-3 ESD and Latch-Up Protection CharacteristicsTable A-2 ESD and Latch-up Test Conditions A.1.8 Power Dissipation and Thermal Characteristics Table A-4 Operating Conditions提供单片机解密、IC解密、芯片解密业务 010-62245566 The total power dissipation can be calculated from A.1.9 I/O Characteristics Table A-5 Thermal Package Characteristics1提供单片机解密、IC解密、芯片解密业务 010-62245566 Table A-6 5V I/O Characteristics 提供单片机解密、IC解密、芯片解密业务 010-622455662. Refer to Section A.1.4 Current Injection, for more details A.1.10 Supply Currents A.1.10.1 Measurement ConditionsA.1.10.2 Additional Remarks Table A-7 Supply Current Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566A.2 ATD Characteristics A.2.1 ATD Operating CharacteristicsA.2.2 Factors influencing accuracy Table A-8 ATD Operating CharacteristicsTable A-9 ATD Electrical Characteristics A.2.2.2 Source capacitanceA.2.2.3 Current injection ≥ 1024 * CA.2.3 ATD accuracy 1LSBINLn = ∑ DNLi = Vn -V0 -n 1LSBResolution Figure A-1 ATD Accuracy DefinitionsVi-1 LSB Vin mVA.3 NVM, Flash and EEPROM A.3.1 NVM timingA.3.1.1 Single Word Programming A.3.1.2 Burst Programmingt mass ≈ tcheck ≈ location ⋅ tcyc + 10 ⋅ tcycTable A-11 NVM Timing Characteristics A.3.1.3 Sector EraseA.3.2 NVM Reliability Table A-12 NVM Reliability CharacteristicsMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566A.4 Voltage Regulator Table A-13 Voltage Regulator Recommended Load Capacitances提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566A.5 Reset, Oscillator and PLL A.5.1 StartupTable A-14 Startup Characteristics A.5.1.3 External ResetA.5.2 Oscillator A.5.1.5 Pseudo Stop and Wait RecoveryTable A-15 Oscillator Characteristics A.5.3 Phase Locked Loop XFC PinK V = K 1 ⋅ e KΦ = -ich ⋅ KV2 ⋅ ζ ⋅ f ref → f Cζ = ζ +J N = max ⎜ N ⋅ t nomJN = j1 + j N ⋅ t nomTable A-16 PLL Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566Δtrk ΔLockA.6 MSCAN Table A-17 MSCAN Wake-up Pulse Characteristics提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566A.7 SPI A.7.1 Master ModeFigure A-5 SPI Master Timing CPHA = 提供单片机解密、IC解密、芯片解密业务 010-62245566Table A-18 SPI Master Mode Timing Characteristics1 Figure A-6 SPI Master Timing CPHA =1提供单片机解密、IC解密、芯片解密业务 010-62245566 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSBA.7.2 Slave Mode Figure A-7 SPI Slave Timing CPHA =Figure A-8 SPI Slave Timing CPHA =1 提供单片机解密、IC解密、芯片解密业务 010-62245566Table A-19 SPI Slave Mode Timing Characteristics SymbolMC9S12DT128B Device User Guide RatingA.8 External Bus Timing A.8.1 General Muxed Bus TimingFigure A-9 General External Bus Timing MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 010-62245566 Table A-20 Expanded Bus Timing Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566Table A-20 Expanded Bus Timing Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566tNOH Appendix B Package Information B.1 General提供单片机解密、IC解密、芯片解密业务 010-62245566 B.2 112-pin LQFP package Figure 22-5 112-pin LQFP mechanical dimensions case no提供单片机解密、IC解密、芯片解密业务 010-62245566 B.3 80-pin QFP package Figure 1 80-pin QFP Mechanical Dimensions case no. 841B提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566User Guide End Sheet MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 FINAL PAGE OF 124 PAGES MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 010-62245566