Motorola MC9S12DG128B, MC9S12DT128B, MC9S12DB128B External Bus Timing, General Muxed Bus Timing

MC9S12DT128B Device User Guide — V01.07

A.8 External Bus Timing

A timing diagram of the external multiplexed-bus is illustrated in Figure A-9with the actual timing values shown on table Table A-20. All major bus signals are included in the diagram. While both a data write and data read cycle are shown, only one or the other would occur on a particular bus cycle.

A.8.1 General Muxed Bus Timing

The expanded bus timings are highly dependent on the load conditions. The timing parameters shown assume a balanced load across all outputs.

115

http://www.xinpian.net 提供单片机解密、IC解密、芯片解密业务 010-62245566 13810019655