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Motorola MC9S12DJ128B, MC9S12DT128B, MC9S12DB128B manual Printed Circuit Board Layout Proposal

Models: MC9S12DT128B

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Section 22 Printed Circuit Board Layout Proposal

MC9S12DT128B Device User Guide — V01.07

Section 22 Printed Circuit Board Layout Proposal

Table 22-1 Suggested External Component Values

	Component	Purpose	Type	Value

	C1	VDD1 ﬁlter cap	ceramic X7R	100 … 220nF

	C2	VDD2 ﬁlter cap	ceramic X7R	100 … 220nF

	C3	VDDA ﬁlter cap	ceramic X7R	100nF

	C4	VDDR ﬁlter cap	X7R/tantalum	>= 100nF

	C5	VDDPLL ﬁlter cap	ceramic X7R	100nF

	C6	VDDX ﬁlter cap	X7R/tantalum	>= 100nF

	C7	OSC load cap

	C8	OSC load cap

	C9 / CS	PLL loop ﬁlter cap	See PLL speciﬁcation chapter

	C10 / CP	PLL loop ﬁlter cap
	C10 / CP	PLL loop ﬁlter cap

	C11 / CDC	DC cutoff cap	Colpitts mode only, if recommended by
	C11 / CDC	DC cutoff cap	quartz manufacturer
			quartz manufacturer

	R1 / R	PLL loop ﬁlter res	See PLL Speciﬁcation chapter

	R2 / RB		Pierce mode only

	R3 / RS
	R3 / RS

	Q1	Quartz

The PCB must be carefully laid out to ensure proper operation of the voltage regulator as well as of the MCU itself. The following rules must be observed:

•Every supply pair must be decoupled by a ceramic capacitor connected as near as possible to the corresponding pins (C1 – C6).

•Central point of the ground star should be the VSSR pin.

•Use low ohmic low inductance connections between VSS1, VSS2 and VSSR.

•VSSPLL must be directly connected to VSSR.

•Keep traces of VSSPLL, EXTAL and XTAL as short as possible and occupied board area for C7, C8, C11 and Q1 as small as possible.

•Do not place other signals or supplies underneath area occupied by C7, C8, C10 and Q1 and the connection area to the MCU.

•Central power input should be fed in at the VDDA/VSSA pins.

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Motorola MC9S12DJ128B, MC9S12DT128B manual Printed Circuit Board Layout Proposal, 1 Suggested External Component Values

Contents

Original Release Date 18 June Revised 16 Aug Motorola, Inc MC9S12DT128B Device User Guide V01.07 Covers alsoMC9S12DG128B, MC9S12DJ128B MC9S12DB128B 提供单片机解密、IC解密、芯片解密业务 010-62245566Version Revision HistoryDOCUMENT NUMBER 9S12DT128BDGV1/D RevisionTable of Contents Section 2 Signal DescriptionSection 1 Introduction 2.3.21 PH6 / KWH6 - Port H I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.22 PH5 / KWH5 - Port H I/O Pin 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.23 PH4 / KWH4 - Port H I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.24 PH3 / KWH3 / SS1 - Port H I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.25 PH2 / KWH2 / SCK1 - Port H I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.26 PH1 / KWH1 / MOSI1 - Port H I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.27 PH0 / KWH0 / MISO1 - Port H I/O Pin 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.28 PJ7 / KWJ7 / TXCAN4 / SCL - PORT J I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . .57 2.3.29 PJ6 / KWJ6 / RXCAN4 / SDA - PORT J I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.30 PJ10 / KWJ10 - Port J I/O Pins 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.31 PK7 / ECS / ROMCTL - Port K I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.32 PK50 / XADDR1914 - Port K I/O Pins 50 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.33 PM7 / BFPSLM / TXCAN4 - Port M I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.34 PM6 / BFPERR / RXCAN4 - Port M I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . .58 2.3.35 PM5 / BFPROK / TXCAN0 / TXCAN4 / SCK0 - Port M I/O Pin 5 . . . . . . . . . . . . .58 2.3.36 PM4 / BFPSYN / RXCAN0 / RXCAN4/ MOSI0 - Port M I/O Pin 4. . . . . . . . . . . . .59 2.3.37 PM3 / TXBF / TXCAN1 / TXCAN0 / SS0 - Port M I/O Pin 3 . . . . . . . . . . . . . . . . .59 2.3.38 PM2 / RXBF / RXCAN1 / RXCAN0 / MISO0 - Port M I/O Pin 2. . . . . . . . . . . . . . .59 2.3.39 PM1 / TXCAN0 / TXB - Port M I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.40 PM0 / RXCAN0 / RXB - Port M I/O Pin 0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.41 PP7 / KWP7 / PWM7 - Port P I/O Pin 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.42 PP6 / KWP6 / PWM6 - Port P I/O Pin 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.43 PP5 / KWP5 / PWM5 - Port P I/O Pin 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.44 PP4 / KWP4 / PWM4 - Port P I/O Pin 4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.45 PP3 / KWP3 / PWM3 / SS1 - Port P I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.46 PP2 / KWP2 / PWM2 / SCK1 - Port P I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.47 PP1 / KWP1 / PWM1 / MOSI1 - Port P I/O Pin 1. . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.48 PP0 / KWP0 / PWM0 / MISO1 - Port P I/O Pin 0. . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.49 PS7 / SS0 - Port S I/O Pin 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.50 PS6 / SCK0 - Port S I/O Pin 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.51 PS5 / MOSI0 - Port S I/O Pin 5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.52 PS4 / MISO0 - Port S I/O Pin 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.53 PS3 / TXD1 - Port S I/O Pin 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.54 PS2 / RXD1 - Port S I/O Pin 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.55 PS1 / TXD0 - Port S I/O Pin 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 2.3.56 PS0 / RXD0 - Port S I/O Pin 0 Section 4 Modes of Operation Section 5 Resets and InterruptsSection 3 System Clock Description Section 6 HCS12 Core Block DescriptionSection 7 Clock and Reset Generator CRG Block Description A.1 General A.1.1 Parameter Classification A.1.2 Power Supply7.1 Device-specific information 7.1.1 XCLKS Appendix B Package Information MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566List of Figures MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566List of Tables $01C0 - $01FF Reserved Preface Table 0-1 Derivative Differences1Temperature Options MC9S12 DJ128B C FUPackage Option Temperature Option Device Title Controller Family Package Options FU = 80QFP PV = 112LQFP1.2 Features Section 1 Introduction1.1 Overview Digital filtering Programmable rising or falling edge trigger Memory 1.3 Modes of Operation 1.4 Block Diagram Figure 1-1 shows a block diagram of the MC9S12DT128B device提供单片机解密、IC解密、芯片解密业务 010-62245566 Figure 1-1 MC9S12DT128B Block Diagram 提供单片机解密、IC解密、芯片解密业务 010-622455661.5 Device Memory Map Table 1-1 Device Memory Map提供单片机解密、IC解密、芯片解密业务 010-62245566 提供单片机解密、IC解密、芯片解密业务 010-62245566 Table 1-1 Device Memory MapFigure 1-2 MC9S12DT128B Memory Map $0000MEBI map 1 of 3 Core User Guide 1.5.1 Detailed Register Map$0000 - $000F $0010 - $0014$0017 - $0017 $0015 - $0016INT map 1 of 2 Core User Guide MMC map 2 of 4 Core User GuideBKP Core User Guide $0020 - $0027Reserved$0028 - $002F $0030 - $0031$0034 - $003F CRG Clock and Reset GeneratorECT Enhanced Capture Timer 16 Bit 8 Channels $0040 - $007FMC9S12DT128B Device User Guide ECT Enhanced Capture Timer 16 Bit 8 Channels$0040 - $007F 提供单片机解密、IC解密、芯片解密业务 010-62245566MC9S12DT128B Device User Guide ECT Enhanced Capture Timer 16 Bit 8 Channels$0040 - $007F 提供单片机解密、IC解密、芯片解密业务 010-62245566$0080 - $009F ECT Enhanced Capture Timer 16 Bit 8 Channels$0040 - $007F ATD0 Analog to Digital Converter 10 Bit 8 Channel$00A0 - $00C7 $0080 - $009FATD0 Analog to Digital Converter 10 Bit 8 Channel PWM Pulse Width Modulator 8 Bit 8 ChannelMC9S12DT128B Device User Guide $00A0 - $00C7PWM Pulse Width Modulator 8 Bit 8 Channel 提供单片机解密、IC解密、芯片解密业务 010-62245566SCI0 Asynchronous Serial Interface $00A0 - $00C7PWM Pulse Width Modulator 8 Bit 8 Channel $00D0 - $00D7$00E0 - $00E7 SCI1 Asynchronous Serial InterfaceSPI0 Serial Peripheral Interface IIC Inter IC Bus$00F0 - $00F7 $00E8 - $00EFBDLC Byte Level Data Link Controller J1850 SPI1 Serial Peripheral Interface$0110 - $011B $0100 - $010FFlash Control Register fts128k2 EEPROM Control Register eets2k$011C - $011F $0110 - $011BEEPROM Control Register eets2k Reserved for RAM Control Register$0140 - $017F $0120 - $013FATD1 Analog to Digital Converter 10 Bit 8 Channel CAN0 Motorola Scalable CAN - MSCANMC9S12DT128B Device User Guide $0140 - $017FCAN0 Motorola Scalable CAN - MSCAN 提供单片机解密、IC解密、芯片解密业务 010-62245566MC9S12DT128B Device User Guide $0180 - $01BFCAN1 Motorola Scalable CAN - MSCAN 提供单片机解密、IC解密、芯片解密业务 010-62245566$01C0 - $01FFReserved $0180 - $01BFCAN1 Motorola Scalable CAN - MSCAN $0200 - $023FReservedMC9S12DT128B Device User Guide $0240 - $027FPIM Port Integration Module 提供单片机解密、IC解密、芯片解密业务 010-62245566MC9S12DT128B Device User Guide $0240 - $027FPIM Port Integration Module 提供单片机解密、IC解密、芯片解密业务 010-62245566MC9S12DT128B Device User Guide $0280 - $02BFCAN4 Motorola Scalable CAN - MSCAN 提供单片机解密、IC解密、芯片解密业务 010-62245566Byteﬂight $02C0 - $02FFReserved$0300 - $035F MC9S12DT128B Device User GuideMC9S12DT128B Device User Guide $0300 - $035FByteﬂight 提供单片机解密、IC解密、芯片解密业务 010-62245566Table 1-3 Assigned Part ID Numbers 1.6 Part ID Assignments$0360 - $03FFReserved Table 1-4 Memory size registersMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Section 2 Signal Description 2.1 Device Pinout提供单片机解密、IC解密、芯片解密业务 Figure 2-1 Pin assignments 112 LQFP for MC9S12DT128B,MC9S12DG128BMC9S12DJ128B, MC9S12DB128B PAD14/AN14MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-622455662.2 Signal Properties Summary Signal Properties提供单片机解密、IC解密、芯片解密业务 010-62245566 Description MC9S12DT128B Device User GuidePin Name FunctionFunction MC9S12DT128B Device User GuideDescription Function2.3.2 RESET - External Reset Pin 2.3 Detailed Signal Descriptions2.3.1 EXTAL, XTAL - Oscillator Pins 2.3.3 TEST - Test Pin2.3.10 PA70 / ADDR158 / DATA158 - Port A I/O Pins 2.3.7 PAD148 / AN160 - Port AD Input Pins2.3.9 PAD60 / AN060 - Port AD Input Pins 2.3.11 PB70 / ADDR70 / DATA70 - Port B I/O PinsFigure 2-6 External Clock Connections PE7=0 Figure 2-4 Colpitts Oscillator Connections PE7=1Figure 2-5 Pierce Oscillator Connections PE7=0 提供单片机解密、IC解密、芯片解密业务 010-622455662.3.15 PE4 / ECLK - Port E I/O Pin 2.3.13 PE6 / MODB / IPIPE1 - Port E I/O Pin2.3.14 PE5 / MODA / IPIPE0 - Port E I/O Pin 2.3.16 PE3 / LSTRB / TAGLO - Port E I/O Pin2.3.23 PH4 / KWH4 - Port H I/O Pin 2.3.21 PH6 / KWH6 - Port H I/O Pin2.3.22 PH5 / KWH5 - Port H I/O Pin 2.3.24 PH3 / KWH3 / SS1 - Port H I/O Pin2.3.29 PJ6 / KWJ6 / RXCAN4 / SDA - PORT J I/O Pin 2.3.30 PJ10 / KWJ10 - Port J I/O Pins2.3.32 PK50 / XADDR1914 - Port K I/O Pins 2.3.31 PK7 / ECS / ROMCTL - Port K I/O Pin2.3.38 PM2 / RXBF / RXCAN1 / RXCAN0 / MISO0 - Port M I/O Pin 2.3.36 PM4 / BFPSYN / RXCAN0 / RXCAN4/ MOSI0 - Port M I/O Pin2.3.37 PM3 / TXBF / TXCAN1 / TXCAN0 / SS0 - Port M I/O Pin 2.3.39 PM1 / TXCAN0 / TXB - Port M I/O Pin2.3.45 PP3 / KWP3 / PWM3 / SS1 - Port P I/O Pin 2.3.43 PP5 / KWP5 / PWM5 - Port P I/O Pin2.3.44 PP4 / KWP4 / PWM4 - Port P I/O Pin 2.3.46 PP2 / KWP2 / PWM2 / SCK1 - Port P I/O Pin2.3.51 PS5 / MOSI0 - Port S I/O Pin 2.4 Power Supply Pins2.3.57 PT70 / IOC70 - Port T I/O Pins 2.3.52 PS4 / MISO0 - Port S I/O PinNOTE All VSS pins must be connected together in the application 2.4.1 VDDX,VSSX - Power & Ground Pins for I/O Drivers2.4.3 VDD1, VDD2, VSS1, VSS2 - Core Power Pins NOTE No load allowed except for bypass capacitors2.4.6 VDDPLL, VSSPLL - Power Supply Pins for PLL 2.4.4 VDDA, VSSA - Power Supply Pins for ATD and VREG2.4.5 VRH, VRL - ATD Reference Voltage Input Pins 2.4.7 VREGEN - On Chip Voltage Regulator EnableMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Section 3 System Clock Description 3.1 OverviewFigure 3-1 Clock Connections MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-622455664.1 Overview 4.2 Chip Configuration SummarySection 4 Modes of Operation Table 4-1 Mode Selection4.3.2 Operation of the Secured Microcontroller 4.3 Security4.3.1 Securing the Microcontroller Table 4-3 Voltage Regulator VREGEN4.4.1 Stop 4.4 Low Power Modes4.3.3 Unsecuring the Microcontroller 4.4.2 Pseudo StopMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-622455665.2 Vectors Section 5 Resets and Interrupts5.1 Overview 5.2.1 Vector Table5.3 Effects of Reset 5.3.1 I/O pins5.3.2 Memory The RAM array is not automatically initialized out of resetMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Section 6 HCS12 Core Block Description Section 7 Clock and Reset Generator CRG Block DescriptionSection 8 Enhanced Capture Timer ECT Block Description Section 9 Analog to Digital Converter ATD Block DescriptionSection 13 J1850 BDLC Block Description DescriptionSection 12 Serial Peripheral Interface SPI Block Description Section 14 Byteflight BF Block DescriptionSection 20 Port Integration Module PIM Block Description Section 18 RAM Block DescriptionSection 19 MSCAN Block Description Section 21 Voltage Regulator VREG Block DescriptionSection 22 Printed Circuit Board Layout Proposal Table 22-1 Suggested External Component ValuesFigure 22-1 Recommended PCB Layout for 112LQFP Colpitts Oscillator 提供单片机解密、IC解密、芯片解密业务 010-62245566Figure 22-2 Recommended PCB Layout for 80QFP Colpitts Oscillator 提供单片机解密、IC解密、芯片解密业务 010-62245566Figure 22-3 Recommended PCB Layout for 112LQFP Pierce Oscillator 提供单片机解密、IC解密、芯片解密业务 010-62245566C1 VSS1 Figure 22-4 Recommended PCB Layout for 80QFP Pierce Oscillator MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 010-62245566 A.1 General Appendix A Electrical CharacteristicsA.1.2 Power Supply A.1.1 Parameter ClassificationA.1.3.1 5V I/O pins A.1.3 PinsA.1.4 Current Injection VDD is used for VDD1, VDD2 and VDDPLL, VSS is used for VSS1, VSS2 andA.1.5 Absolute Maximum Ratings A.1.6 ESD Protection and Latch-up ImmunityTable A-1 Absolute Maximum Ratings1 A.1.7 Operating Conditions Table A-3 ESD and Latch-Up Protection CharacteristicsTable A-2 ESD and Latch-up Test Conditions A.1.8 Power Dissipation and Thermal Characteristics Table A-4 Operating Conditions提供单片机解密、IC解密、芯片解密业务 010-62245566 The total power dissipation can be calculated from A.1.9 I/O Characteristics Table A-5 Thermal Package Characteristics1提供单片机解密、IC解密、芯片解密业务 010-62245566 Table A-6 5V I/O Characteristics 提供单片机解密、IC解密、芯片解密业务 010-622455662. Refer to Section A.1.4 Current Injection, for more details A.1.10 Supply Currents A.1.10.1 Measurement ConditionsA.1.10.2 Additional Remarks Table A-7 Supply Current Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566A.2.2 Factors influencing accuracy A.2 ATD CharacteristicsA.2.1 ATD Operating Characteristics Table A-8 ATD Operating CharacteristicsA.2.2.3 Current injection Table A-9 ATD Electrical CharacteristicsA.2.2.2 Source capacitance ≥ 1024 * CINLn = ∑ DNLi = Vn -V0 -n A.2.3 ATD accuracy1LSB 1LSBVi-1 LSB ResolutionFigure A-1 ATD Accuracy Definitions Vin mVA.3.1.1 Single Word Programming A.3 NVM, Flash and EEPROMA.3.1 NVM timing A.3.1.2 Burst ProgrammingTable A-11 NVM Timing Characteristics t mass ≈tcheck ≈ location ⋅ tcyc + 10 ⋅ tcyc A.3.1.3 Sector EraseA.3.2 NVM Reliability Table A-12 NVM Reliability CharacteristicsMC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566A.4 Voltage Regulator Table A-13 Voltage Regulator Recommended Load Capacitances提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Table A-14 Startup Characteristics A.5 Reset, Oscillator and PLLA.5.1 Startup A.5.1.3 External ResetA.5.2 Oscillator A.5.1.5 Pseudo Stop and Wait RecoveryTable A-15 Oscillator Characteristics K V = K 1 ⋅ e A.5.3 Phase Locked LoopXFC Pin KΦ = -ich ⋅ KVζ = 2 ⋅ ζ ⋅ f ref→ f C ζ +JN = j1 + j J N = max ⎜N ⋅ t nom N ⋅ t nomΔtrk Table A-16 PLL Characteristics提供单片机解密、IC解密、芯片解密业务 010-62245566 ΔLockA.6 MSCAN Table A-17 MSCAN Wake-up Pulse Characteristics提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566Figure A-5 SPI Master Timing CPHA = A.7 SPIA.7.1 Master Mode 提供单片机解密、IC解密、芯片解密业务 010-62245566提供单片机解密、IC解密、芯片解密业务 010-62245566 Table A-18 SPI Master Mode Timing Characteristics1Figure A-6 SPI Master Timing CPHA =1 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSBFigure A-8 SPI Slave Timing CPHA =1 A.7.2 Slave ModeFigure A-7 SPI Slave Timing CPHA = 提供单片机解密、IC解密、芯片解密业务 010-62245566MC9S12DT128B Device User Guide Table A-19 SPI Slave Mode Timing CharacteristicsSymbol RatingA.8 External Bus Timing A.8.1 General Muxed Bus TimingFigure A-9 General External Bus Timing MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 010-62245566 Table A-20 Expanded Bus Timing Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566Table A-20 Expanded Bus Timing Characteristics 提供单片机解密、IC解密、芯片解密业务 010-62245566tNOH Appendix B Package Information B.1 General提供单片机解密、IC解密、芯片解密业务 010-62245566 B.2 112-pin LQFP package Figure 22-5 112-pin LQFP mechanical dimensions case no提供单片机解密、IC解密、芯片解密业务 010-62245566 B.3 80-pin QFP package Figure 1 80-pin QFP Mechanical Dimensions case no. 841B提供单片机解密、IC解密、芯片解密业务 010-62245566 MC9S12DT128B Device User Guide 提供单片机解密、IC解密、芯片解密业务 010-62245566User Guide End Sheet MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 FINAL PAGE OF 124 PAGES MC9S12DT128B Device User Guide提供单片机解密、IC解密、芯片解密业务 010-62245566