Texas Instruments TMS320DM644x manual Supported Use Case Statement

Peripheral Architecture
	Figure 1. MMC/SD Card Controller Block Diagram
ARM CPU
		MMC/SD
		interface
DMA requests	Status	CLK
	and
		divider
Interrupts	registers
		FIFO

1.4Supported Use Case Statement

The MMC/SD card controller supports the following user cases:

∙MMC/SD card identification

∙MMC/SD single-block read using CPU

∙MMC/SD single-block read using EDMA

∙MMC/SD single-block write using CPU

∙MMC/SD single-block write using EDMA

∙MMC/SD multiple-block read using CPU

∙MMC/SD multiple-block read using EDMA

∙MMC/SD multiple-block write using CPU

∙MMC/SD multiple-block write using EDMA

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MMC/SD card interface

1.5Industry Standard(s) Compliance Statement

The MMC/SD card controller supports the following industry standards (with the exception noted below):

∙MMC (Multimedia Card) Specification V3.31

∙SD (Secure Digital) Physical Layer Specification V1.1

The information in this document assumes that you are familiar with these standards.

The MMC/SD controller does not support the SPI mode of operation.

2Peripheral Architecture

The MMC/SD controller uses the MMC/SD protocol to communicate with the MMC/SD cards. You can configure the MMC/SD controller to work as an MMC or SD controller, based on the type of card the controller is communicating with. Figure 2 summarizes the MMC/SD mode interface. Figure 3 illustrates how the controller interfaces to the cards in MMC/SD mode.

In the MMC/SD mode, the MMC controller supports one or more MMC/SD cards. Regardless of the number of cards connected, the MMC/SD controller selects one by using identification broadcast on the data line. The following MMC/SD controller pins are used:

∙CMD: This pin is used for two-way communication between the connected card and the MMC/SD controller. The MMC/SD controller transmits commands to the card and the memory card drives responses to the commands on this pin.

∙DAT0 or DAT0-3: MMC cards only use one data line (DAT0) and SD cards use one or four data lines. The number of DAT pins (the data bus width) is set by the WIDTH bit in the MMC control register (MMCCTL), see Section 4.1).

∙CLK: This pin provides the clock to the memory card from the MMC/SD controller.

10 Multimedia Card (MMC)/Secure Digital (SD) Card Controller SPRUE30B –September 2006

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