Texas Instruments TMS320DM644x manual MMC/SD Mode Single-Block Write Operation Using CPU

Models: TMS320DM644x

1 61
Download 61 pages 29.83 Kb
Page 32
Image 32

www.ti.com

Procedures for Common Operations

3.2MMC/SD Mode Single-Block Write Operation Using CPU

To perform a single-block write, the block length must be 512 bytes and the same length needs to be set in both the MMC/SD controller and the memory card. The procedure for this operation is:

1.Write the card’s relative address to the MMC argument registers (MMCARGH and MMCARGL). Load the higher part of the address to MMCARGH and the low part of the address to MMCARGL.

2.Use the MMC command register (MMCCMD) to send the SELECT/DESELECT_CARD broadcast command. This selects the addressed card and deselects the others.

3.Write the destination start address to the MMC argument registers. Load the high part to the MMCARGH register and the low part to MMCARGL.

4.Read the card CSD to determine the card’s maximum block length.

5.Use MMCCMD to send the SET_BLOCKLEN command (if the block length is different than the length used in the previous operation). The block length must be a multiple of 512 bytes and less then the maximum block length specified in the CSD.

6.Reset the FIFO (FIFORST bit in MMCFIFOCTL).

7.Set the FIFO direction to transmit (FIFODIR bit in MMCFIFOCTL).

8.Set the access width (ACCWD bits in MMCFIFOCTL).

9.Enable the MMC interrupt.

10.Enable the DXRDYINT interrupt.

11.Write the first 32 bytes of the data block to the data transmit register (MMCDXR).

12.Use MMCCMD to send the WRITE_BLOCK command to the card.

13.Wait for the MMC interrupt.

14.Use the MMC status register 0 (MMCST0) to check for errors and the status of the FIFO. If all of the data has not been written and if the FIFO is not full, go to step 15. If all of the data has been written, stop.

15.Write the next n bytes (this depends on the setting of the FIFOLEV bit in MMCFIFOCTL: 0 = 16 bytes, 1 = 32 bytes) of the data block to the MMC data transmit register (MMCDXR) and go to step 13.

The sequence of events in this operation is shown in Figure 14.

32

Multimedia Card (MMC)/Secure Digital (SD) Card Controller

SPRUE30B –September 2006

Submit Documentation Feedback

Page 32
Image 32
Texas Instruments TMS320DM644x manual MMC/SD Mode Single-Block Write Operation Using CPU