Texas Instruments TNETX3270 Ieee Std 802.1Q headers ± reception, Address maintenance

TNETX3270

ThunderSWITCH 24/3 ETHERNET SWITCH

WITH 24 10-MBIT/S PORTS AND 3 10-/100-MBIT/S PORTS

SPWS043B ± NOVEMBER 1997 ± REVISED APRIL 1999

IEEE Std 802.1Q headers ± reception

When the internal address-lookup engine (IALE) examines the received frame, it contains an IEEE Std 802.1Q header (after the source address). The header used depends on the port configuration. If the port is configured as an access port, then IALE always uses the default VLAN ID (VID) programmed for this port. It accepts all received frames on this port as untagged. If the frame already contains a header, it is tagged again. If the port is programmed as a non-access port, then the header added depends on the received frame. If the frame is not tagged, or the value of the header field is 0x000, then the default port VID is used to tag the frame internally. Otherwise, the VID contained in the frame is used by the IALE.

The IALE does not support all 4096 VLAN IDs that can be encoded within the IEEE Std 802.1Q header at the same time. The TNETX3270 has support for 32 VLANs, the VID in the received frame is compared with these 32 VLAN IDs to see which (if any) it matches. The designer can use any of the 4096 VLAN ID values for these 32 VLAN IDs.

unknown VLAN

If there is no match, then the rest of the address-lookup process is abandoned. A new VLAN interrupt is provided to the attached CPU. The source address, VLAN ID, and port information is provided in internal registers so that the CPU can determine if it wants to add this VID to the lookup table. If the destination address is unicast, then the frame is discarded. If the destination address is multicast/broadcast, then the frame is forwarded based on a programmable port mask.

known VLAN

If there is a match, the VLAN index associated with this VID together with the destination and source address, are forwarded to the address-lookup and subsequent routing process. Only one of the VLAN IDs match if they have been programmed correctly. If more than one matches, the hardware chooses one of them.

new VLAN member

The IALE checks to see if the source port already has been declared as a member of this VLAN. If not, then an interrupt is provided to allow the attached CPU to add this port as a new member of the VLAN.

IEEE Std 802.1Q headers ± transmission

The IEEE Std 802.1Q header is carried in the frame to the transmitting MAC port, where the decision to strip out the header before transmission is made, based on the port configuration. If the port is configured as an access port, the header is stripped before transmission. If the frame is only 64 bytes long, then 4 bytes of pad (0s) are inserted between the end of the data and the start of the CRC word (a new CRC value is calculated and inserted in the frame). If the port is configured as a non-access port, the VID is compared with the default port VID. If they match, the header is stripped. Otherwise, the header is retained.

If the frame is transmitted to the NM port, then no header stripping occurs. The frame is transmitted unaltered. It may contain one or two headers, depending on how the frame was originally received.

address maintenance

The addresses within the IALE can be maintained automatically by the TNETX3270, where addresses are learned/updated from the wire and deleted, using one of two aging algorithms. Multicast addresses are not automatically learned or aged. The attached CPU can add/update, find, or delete address records via the DIO interface.

At times of peak activity, it may not be possible to learn or update every source address that is received. The IALE backlogs up to one source address per port under these circumstances. Subsequent source addresses received on a backlogged port are not learned/updated until that port's backlog has been cleared. Lookups are always given priority in the IALE, so these can never backlog.

The learning and aging processes are independent. This allows addresses to be learned automatically from the wire, but allows the CPU to manage the aging process under software control.

40 POST OFFICE BOX 655303 •DALLAS, TEXAS 75265