
TNETX3270
ThunderSWITCH 24/3 ETHERNET SWITCH
WITH 24 10-MBIT/S  PORTS AND 3 10-/100-MBIT/S  PORTS
SPWS043B ± NOVEMBER 1997 ± REVISED APRIL 1999
Terminal Functions
  | TERMINAL | 
  | I/O  | INTERNAL | 
  | DESCRIPTION | |||
  | NAME | NO.  | RESISTOR³ | 
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  | TH0CLK | 222  | 
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  | Interface clock. Eight ports are supported on each interface and use this common   | ||||
  | TH1CLK  | 2  | I  | Pullup  | |||||
  | clock.  | 
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  | TH2CLK | 23  | 
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  | TH0COL | 223  | 
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  | Interface collision sense. Assertion of THxCOL² during   | ||||
  | TH1COL | 3  | I  | Pulldown  | network collision on the current port. Additionally, during   | ||||
  | TH2COL  | 24  | 
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  | of new frames does not start if this terminal is asserted.  | ||||
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  | TH0CRS | 224  | 
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  | Interface carrier sense. THxCRS²  | indicates a frame carrier signal is being received on a  | |||
  | TH1CRS  | 5  | I  | Pulldown  | |||||
  | current port.  | 
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  | TH2CRS  | 25  | 
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  | TH0LINK  | 232  | 
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  | Interface link presence. THxLINK²  | indicates the presence of the connection on a port.  | |||
  | TH1LINK  | 13  | I  | Pulldown  | ± Low = no link  | 
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  | TH2LINK | 32  | 
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  | ± High = link good  | 
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  | Interface renegotiate. A   | 
  | causes flow control and  | |
  | TH0RENEG  | 
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  | THxRENEG  | ||||
  | TH1RENEG | 233 | O  | None | half/full duplex for a port to be renegotiated with its companion   | ||||
  | TH2RENEG  | 15  | 
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  | These THxRENEG terminals connect to IFFORCEHD on TNETE2008.  | ||||
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  | TH0RXD3  | 231  | 
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  | TH0RXD2  | 230  | 
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  | TH0RXD1  | 228  | 
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  | TH0RXD0  | 227  | 
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  | TH1RXD3  | 11  | 
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  | Interface receive data. The receive data nibble from the current port is synchronous to  | ||||
  | TH1RXD2 | 10  | I  | Pullup  | THxCLK. When the THxRXDV signal is 1, the receive data terminals contain valid information.  | ||||
  | TH1RXD1 | 9  | THxRXD0 is the least significant bit and THxRXD3 is the most significant bit. These signals  | ||||||
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  | TH1RXD0  | 7  | 
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  | also are used to report the channel state to the MAC.  | ||||
  | TH2RXD3  | 30  | 
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  | TH2RXD2  | 29  | 
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  | TH2RXD1  | 28  | 
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  | TH2RXD0  | 27  | 
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  | TH0TXEN  | 219  | 
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  | TH1TXEN  | 240  | O  | None  | Interface transmit enable. THxTXEN indicates valid transmit data on THxTXD.  | ||||
  | TH2TXEN | 21  | 
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  | TH0SYNC | 221  | 
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  | Interface synchronize. THxSYNC  | is used to synchronize the port traffic between the  | |||
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  | TH1SYNC | 1  | I  | Pullup  | |||||
  | path is the multiplexer interface TH0, and the   | ||||||||
  | TH2SYNC | 22  | 
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  | TH2. THxSYNC is sampled by the MAC on the falling edge of THxCLK.  | ||||||
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² THx = TH0, TH1, and TH2
³Internal resistors are provided to pull signals to known values. System designers should determine if additional pullups or pulldowns are required in their system.
6  | POST OFFICE BOX 655303 •DALLAS, TEXAS 75265  |