TNETX3270
ThunderSWITCH 24/3 ETHERNET SWITCH
WITH 24 10-MBIT/S PORTS AND 3 10-/100-MBIT/S PORTS
SPWS043B ± NOVEMBER 1997 ± REVISED APRIL 1999
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| Terminal Functions (Continued) | ||
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TERMINAL |
| I/O | INTERNAL | DESCRIPTION | |
NAME | NO. | RESISTOR | |||
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M24RXD3 | 49 |
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M24RXD2 | 48 |
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M24RXD1 | 47 |
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M24RXD0 | 46 |
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M25RXD3 | 73 |
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| Receive data (nibble receive data from the attached PHY or PMI device). Data on these | |
M25RXD2 | 71 |
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I | Pullup | signals is synchronous to MxxRCLK. MxxRXD0 is the least significant bit and MxxRXD3 | |||
M25RXD1 | 70 | ||||
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| is the most significant bit. | |||
M25RXD0 | 69 |
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M26RXD3 | 98 |
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M26RXD2 | 97 |
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M26RXD1 | 96 |
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M26RXD0 | 95 |
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M24RXDV | 50 |
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| Receive data valid. When high, MxxRXDV indicates valid data is present on the | |
M25RXDV | 75 | I | Pulldown | ||
MxxRXD3±MxxRXD0 lines. | |||||
M26RXDV | 99 |
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M24RXER | 51 |
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M25RXER | 76 | I | Pulldown | Receive error. MxxRXER indicates a coding error on received data. | |
M26RXER | 101 |
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M24TCLK | 33 |
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M25TCLK | 56 | I | Pullup | Transmit clock. Transmit clock source from the attached PHY or PMI device. | |
M26TCLK | 82 |
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M24TXD3 | 38 |
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M24TXD2 | 37 |
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M24TXD1 | 36 |
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M24TXD0 | 35 |
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M25TXD3 | 61 |
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| Transmit data (nibble transmit data). When MxxTXEN is asserted, these signals carry | |
M25TXD2 | 60 |
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O | None | transmit data. Data on these signals is synchronous to MxxTCLK. MxxTXD0 is the least | |||
M25TXD1 | 59 | ||||
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| significant bit and MxxTXD3 is the most significant bit. | |||
M25TXD0 | 57 |
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M26TXD3 | 86 |
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M26TXD2 | 85 |
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M26TXD1 | 84 |
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M26TXD0 | 83 |
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M24TXEN | 39 |
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M25TXEN | 62 | O | None | Transmit enable. MxxTXEN indicates valid transmit data on MxxTXD3±MxxTXD0. | |
M26TXEN | 87 |
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M24TXER | 41 |
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| Transmit error. MxxTXER allows coding errors to be propagated across the MII. MxxTXER | |
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| is taken high when an | |||
M25TXER | 63 | O | None | ||
to be transmitted (MxxTXER is low otherwise). MxxTXER is asserted at the end of an | |||||
M26TXER | 89 |
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²xx = ports 24, 25, and 26
8 | POST OFFICE BOX 655303 •DALLAS, TEXAS 75265 |
