STATUS BYTE
Hardware event registers
This is a device dependent register and the bits have meanings as shown in the list at the bottom of the page.
Condition
Register
HCR? |
| d15 | d14 |
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| Transition |
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| Filter # |
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Register |
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d15 | d14 |
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Read/Write |
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Commands |
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Status |
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| Register |
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HSR? |
| d15 | d14 |
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& |
& |
OR |
Enable
Register
HSE | e15 | e14 |
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HSE? |
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| d3 | d2 | d1 | d0 | ||||
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d3 | d2 | d1 | d0 |
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| d3 | d2 | d1 | d0 |
& |
& |
& |
& |
| e3 | e2 | e1 | e0 |
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| <hsb> | # Positive transition sets status. | C0068 | ||
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d0 | reverse power protection tripped |
| d8 | filter unleveled |
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d1 |
| d9 | output unleveled |
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d2 |
| d10 | high power amplifier failed |
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d3 | external standard missing |
| d11 | ALC too high |
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d4 | external standard frequency too low | d12 | ALC too low |
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d5 | external standard frequency too high | d13 | DSP not responding |
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d6 | VCXO loop low |
| d14 | RF level uncalibrated |
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d7 | VCXO loop high |
| d15 | not used |
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<hsb> hardware event register summary bit