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Chapter 5: Synthesizing a Design
11.From the main project window, click Change Target to display the Options for Implementation dialog box, as shown in Figure
Figure 5-15: Options for Implementation: Device
12.On the Device tab, set the Technology, Part, Speed, and Package options to reflect the targeted device (a
13.On the Options/Constraints tab, deselect Symbolic FSM Compiler (leave Resource Sharing selected) and set the Frequency to 66 MHz.
14.On the Implementation Results tab, deselect Write Vendor Constraint File.
15.Click OK to return to the main project window; then click Run.
Synplify synthesizes the design and writes out an optimized EDIF file. In the lower- right corner of the window, the various stages or synthesis, such as Compiling or Mapping, are displayed. When the process is complete, Done is displayed. Note that Synplify may issue a number of warnings (which are expected) about instantiated I/O cells and attributes used for other synthesis tools.
Exemplar LeonardoSpectrum
Before attempting to synthesize a design, ensure that the Exemplar LeonardoSpectrum environment is properly configured for use.
1.Navigate to the synthesis directory:
cd <Install Path>/hdl/example/synthesis
The synthesis directory contains a script for use with LeonardoSpectrum.
2.Edit the script to change the following line:
cd <Install Path>/hdl/example/synthesis
Modify the path to point to the actual installation location, and then save the file.
3.Invoke LeonardoSpectrum.
Depending on the implementation, you may also need to change the wrapper file and the simulation model, but this is not required for the example design.
4.Synthesize the design by running the leonardo_s.tcl script.
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| UG158 March 24, 2008 |
