Xilinx UG518 manual Fpga Awake LED and Suspend Jumper, Suspend Mode I/O

Detailed Description

11. FPGA Awake LED and Suspend Jumper

The suspend mode jumper permits the FPGA to enter an inactive, "suspend" mode. The FPGA Awake LED DS8 will go out when the FPGA enters this mode.

FPGA AWAKE

	2
LED-		DS8
	1
GRN-S			FPGA SUSPEND
MT	1
		J14 Suspend Jumper

1R88

27.4 OFF = AWAKE (default)

2	1%		ON = SUSPEND	2
		1/16W

VCC2V5

R18	H-	2	1
4.7K
	1X2		J14
5%
1/16W

UG518_19_070809

Figure 1-19:FPGA Awake LED and Suspend Jumper

Table 1-15:FPGA Awake/Suspend Mode Jumper Connections

FPGA U1 Pin	Schematic Netname	Suspend Mode I/O
P15	FPGA_AWAKE	Awake LED DS8.2
R16	FPGA_SUSPEND	Suspend J14.2
NET "FPGA_AWAKE"		LOC = "P15";
NET "FPGA_SUSPEND"		LOC = "R16";

Figure 1-20:UCF Location Constraints for FPGA Awake/Suspend Mode Jumper

See the Spartan-6 FPGA Configuration Guide for more information at

http://www.xilinx.com/support/documentation/user_guides/ug380.pdf.

SP601 Hardware User Guide www.xilinx.com 33

UG518 (v1.1) August 19, 2009