Intel 5400 Series Thermal Monitor for Multiple Core Products, PROCHOT#, THERMTRIP#, and FORCEPR#

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Thermal/Mechanical Reference Design

2.2.4.2Thermal Monitor for Multiple Core Products

The thermal management for multiple core products has only one TCONTROL value per processor. The TCONTROL for processor 0 and TCONTROL for processor 1 are independent from each other. If the DTS temperature from any domain within the processor is

greater than or equal to TCONTROL, the processor case temperature must remain at or below the temperature as specified by the thermal profile. See Section 2.2.6 for

information on TCONTROL. The PECI signal is available through CPU pin (G5) on each LGA771 socket for the Quad-Core Intel® Xeon® Processor 5400 Series. Through this pin, the two domains provide the current hottest value received from all the temperature sensors, to an external PECI device such as a thermal management system.

2.2.4.3PROCHOT#, THERMTRIP#, and FORCEPR#

The PROCHOT# and THERMTRIP# outputs will be shared by all cores on a processor. The first core to reach TCC activation will assert PROCHOT#. A single FORCEPR# input will be shared by every core. Table 2-2provides an overview of input and output conditions for the Quad-Core Intel® Xeon® Processor 5400 Series thermal management features.

Table 2-2. Input and Output Conditions for the Quad-Core Intel® Xeon® Processor 5400 Series Thermal Management Features

Item

Processor Input

Processor Output

 

 

 

TM1/TM2

DTSCore X > TCC Activation Temperature

All Cores TCC Activation

 

 

 

PROCHOT#

DTSCore X > TCC Activation Temperature

PROCHOT# Asserted

 

 

 

THERMTRIP#

DTSCore X > THERMTRIP # Assertion

THERMTRIP# Asserted,

Temperature

all cores shut down

 

 

 

 

 

FORCEPR#

FORCEPR# Asserted

All Cores TCC Activation

 

 

 

Note:

1.X=1,2,3,4; represents any one of the core1, core2, core3 and core4 in the Quad-Core Intel® Xeon® Processor 5400 Series.

2.For more information on PROCHOT#, THERMTRIP#, and FORCEPR# see the Quad-Core Intel® Xeon® Processor 5400 Series Datasheet.

2.2.4.4Heatpipe Orientation for Multiple Core Processors

Thermal management of multiple core processors can be achieved without the use of heatpipe heatsinks, as demonstrated by the Intel Reference Thermal Solution discussed in Section 2.5.

To assist customers interested in designing heatpipe heatsinks, processor core locations have been provided. In some cases, this may influence the designer’s selection of heatpipe orientation. For this purpose, the core geometric center locations, as illustrated in Figure 2-6, are provided in Table 2-3. Dimensions originate from the vertical edge of the IHS nearest to the pin 1 fiducial as shown in Figure 2-6.

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Quad-Core Intel® Xeon® Processor 5400 Series TMDG

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Contents Quad-Core Intel Xeon Processor 5400 Series Thermal/Mechanical Design GuidelinesQuad-Core Intel Xeon Processor 5400 Series Tmdg Contents Figures Preload Test Configuration Tables Reference Revision Description Date Number Initial release of the documentQuad-Core Intel Xeon Processor 5400 Series Tmdg Scope ObjectiveReferences Terms and Descriptions Sheet 1 Definition of TermsTerm Description Terms and Descriptions Sheet 2 TDPIntroduction Processor Mechanical Parameters Table Mechanical RequirementsProcessor Mechanical Parameters Parameter Minimum Maximum UnitQuad-Core Intel Xeon Processor 5400 Series Package Thermal/Mechanical Reference Design Thermal/Mechanical Reference Design Thermal/Mechanical Reference Design Quad-Core Intel Xeon Processor 5400 Series Considerations Processor Thermal Parameters and Features Thermal Control Circuit and TDPDigital Thermal Sensor Multiple Core Special Considerations Platform Environmental Control Interface PeciMultiple Digital Thermal Sensor Operation Heatpipe Orientation for Multiple Core Processors Thermal Monitor for Multiple Core ProductsPROCHOT#, THERMTRIP#, and FORCEPR# Processor Input Processor OutputProcessor Core Geometric Center Dimensions Feature DimensionThermal Profile Equation 2-1.y = ax + bTcontrol Definition Equation 2-2.TCONTROL= -TOFFSETTcontrol and Thermal Profile Interaction Thermal Profile B Performance Targets Thermal/Mechanical Reference Design Thermal/Mechanical Reference Design 2U+ CEK, Thermal Profile a Parameter Maximum Unit1U CEK, Thermal Profile B Sea-Level Fan Fail Guidelines1U Alternative Heatsink Characterizing Cooling Solution Performance Requirements Fan Speed ControlEquation 2-3.ΨCA= Tcase TLA / TDP Processor Thermal Characterization Parameter RelationshipsFan Speed Control, Tcontrol and DTS Relationship Condition FSC SchemeExample Equation 2-4.ΨCA= ΨCS + ΨSAEquation 2-5.ΨCA= Tcase TLA / TDP = 68 45 / 85 = 0.27 C/W Chassis Thermal Design ConsiderationsChassis Thermal Design Capabilities and Improvements Equation 2-6.ΨSA= ΨCA − ΨCS = 0.27 − 0.05 = 0.22 C/WThermal/Mechanical Reference Design Considerations Heatsink SolutionsHeatsink Design Considerations Thermal Interface Material SummaryAssembly Drawing Geometric EnvelopeStructural Considerations of CEK Thermal Solution Performance Characteristics 17 U+ CEK Heatsink Thermal PerformanceThermal Profile Adherence Equation 2-8.y = 0.187*X +=0.187* X +40 Equation 2-9.y = 0.246*X +1UCEKReference Solution Equation 2-10.y = 0.246*X +Components Overview Heatsink with Captive Screws and Standoffs22. Isometric View of the 2U+ CEK Heatsink Thermal Interface Material TIM CEK Heatsink Thermal Mechanical CharacteristicsRecommended Thermal Grease Dispense Weight Processor Minimum Maximum UnitsCEK Spring 24. CEK Spring Isometric ViewThermal/Mechanical Reference Design Fan Specifications Boxed 4-wire PWM/DTS Heatsink Solution Fan Power SupplyDescription Min Typ Max Unit Steady Startup Boxed Processor Contents Systems Considerations Associated with the Active CEKThermal/Mechanical Reference Design Component Overview Figure A-1. Isometric View of the 1U Alternative HeatsinkThermal Profile Adherence Thermal Solution Performance CharactericsEquation A-1. y = 0.331*x + = Processor power value W 1U Alternative Heatsink Thermal/Mechanical Design Table B-1. Mechanical Drawing List Drawing DescriptionFigure B-1 2U CEK Heatsink Sheet 1 Figure B-2 2U CEK Heatsink Sheet 2 Figure B-3 U CEK Heatsink Sheet 3 Figure B-4 2U CEK Heatsink Sheet 4 Figure B-5. CEK Spring Sheet 1 Figure B-6. CEK Spring Sheet 2 Figure B-7. CEK Spring Sheet 3 Mechanical Drawings Mechanical Drawings Mechanical Drawings Mechanical Drawings Mechanical Drawings Mechanical Drawings Figure B-14 U CEK Heatsink Sheet 1 Figure B-15 U CEK Heatsink Sheet 2 Figure B-16 U CEK Heatsink Sheet 3 Figure B-17 U CEK Heatsink Sheet 4 Figure B-18. Active CEK Thermal Solution Volumetric Sheet 1 Figure B-19. Active CEK Thermal Solution Volumetric Sheet 2 Figure B-20. Active CEK Thermal Solution Volumetric Sheet 3 Figure B-21 U Alternative Heatsink 1 Figure B-22 U Alternative Heatsink 2 Figure B-23 U Alternative Heatsink 3 Figure B-24 U Alternative Heatsink 4 Mechanical Drawings Test Preparation OverviewHeatsink Preparation Alternate Heatsink Sample Preparation Figure C-3. Preload Test Configuration Typical Test Equipment Test Procedure ExamplesTime-Zero, Room Temperature Preload Measurement Table C-1. Typical Test EquipmentPreload Degradation under Bake Conditions Heatsink Clip Load Methodology Safety Requirements Safety Requirements Intel Verification Criteria for the Reference Designs Environmental Reliability TestingStructural Reliability Testing Reference Heatsink Thermal VerificationPost-Test Pass Criteria 2.2 Recommended Test SequenceTable E-1 Use Conditions Environment Recommended BIOS/Processor/Memory Test Procedures Material and Recycling RequirementsQuality and Reliability Requirements Intel Enabled Suppliers Supplier InformationAdditional Suppliers For 1U2U Heatsink Alternative CEK Copper Fin Alternative CEK Copper Fin Enabled Suppliers Information 100 Quad-Core Intel Xeon Processor 5400 Series Tmdg
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