Analog Devices ADuC812 manual General Description, Functional Block Diagram

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MicroConverter®, Multichannel

12-Bit ADC with Embedded FLASH MCU

 

 

 

 

 

ADuC812

 

 

 

FEATURES

ANALOG I/O

8-Channel, High Accuracy 12-Bit ADC On-Chip, 100 ppm/ C Voltage Reference High-Speed 200 kSPS

DMA Controller for High-Speed ADC-to-RAM Capture Two 12-Bit Voltage Output DACs

On-Chip Temperature Sensor Function

MEMORY

8K Bytes On-Chip Flash/EE Program Memory

640Bytes On-Chip Flash/EE Data Memory

256Bytes On-Chip Data RAM

16M Bytes External Data Address Space

64K Bytes External Program Address Space

8051-COMPATIBLE CORE

12 MHz Nominal Operation (16 MHz Max) Three 16-Bit Timer/Counters

High Current Drive Capability—Port 3

Nine Interrupt Sources, Two Priority Levels

POWER

Specified for 3 V and 5 V Operation Normal, Idle, and Power-Down Modes

ON-CHIP PERIPHERALS UART Serial I/O

2-Wire (I2C®-Compatible) and SPI® Serial I/O Watchdog Timer

Power Supply Monitor

APPLICATIONS

Intelligent Sensors Calibration and Conditioning

Battery Powered Systems (Portable PCs, Instruments,

Monitors)

Transient Capture Systems

DAS and Communications Systems

Control Loop Monitors (Optical Networks/Base Stations)

GENERAL DESCRIPTION

The ADuC812 is a fully integrated 12-bit data acquisition system incorporating a high performance self calibrating multichannel ADC, dual DAC and programmable 8-bit MCU (8051 instruc- tion set compatible) on a single chip.

The programmable 8051-compatible core is supported by 8K bytes Flash/EE program memory, 640 bytes Flash/EE data memory and 256 bytes data SRAM on-chip.

Additional MCU support functions include Watchdog Timer, Power Supply Monitor and ADC DMA functions. 32 Pro- grammable I/O lines, I2C-compatible, SPI and Standard UART Serial Port I/O are provided for multiprocessor interfaces and I/O expansion.

Normal, idle, and power-down operating modes for both the MCU core and analog converters allow for flexible power man- agement schemes suited to low power applications. The part is specified for 3 V and 5 V operation over the industrial tem- perature range and is available in a 52-lead, plastic quad flatpack package.

FUNCTIONAL BLOCK DIAGRAM

 

 

P0.0–P0.7

 

P1.0–P1.7

P2.0–P2.7

P3.0–P3.7

 

 

 

 

AIN0 (P1.0)–AIN7 (P1.7)

 

 

 

12-BIT

 

 

ADC

 

 

DAC0

BUF

 

 

DAC0

 

 

 

 

 

CONTROL

DAC

 

 

 

 

 

 

 

AIN

T/H

SUCCESSIVE

 

 

 

 

 

 

 

 

 

 

 

AND

 

 

 

 

 

 

 

MUX

APPROXIMATION

 

CONTROL

 

 

 

 

 

 

 

 

CALIBRATION

 

 

 

 

 

 

 

 

 

 

ADC

 

 

 

 

BUF

 

 

 

 

 

 

 

 

 

LOGIC

 

 

DAC1

 

 

DAC1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

T0 (P3.4)

 

 

 

 

 

 

 

 

MICROCONTROLLER

 

 

 

 

T1 (P3.5)

 

 

 

 

 

 

8051 BASED

POWER SUPPLY

 

3

16-BIT

 

 

T2 (P1.0)

 

2.5V

TEMP

 

 

MICROCONTROLLER CORE

MONITOR

 

TIMER/COUNTERS

T2EX (P1.1)

 

REF

SENSOR

 

 

8K

8 PROGRAM

WATCHDOG

 

2-WIRE

 

 

 

INT0 (P3.2)

 

 

 

 

 

 

 

SPI

 

 

 

 

 

FLASH EEPROM

TIMER

 

SERIAL I/O

 

 

 

 

 

 

 

 

 

INT1 (P3.3)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VREF

BUF

 

 

 

640

8 USER

UART

 

 

MUX

 

 

ALE

 

 

 

FLASH EEPROM

 

 

 

 

 

 

 

 

 

256

8 USER

 

 

 

 

 

 

PSEN

 

 

ADuC812

OSC

 

 

 

 

 

EA

 

 

 

 

RAM

 

 

 

 

 

CREF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RESET

 

 

AVDD

AGND

DVDD

DGND

 

 

XTAL1 XTAL2 RxD

TxD

SCLOCK MOSI/

 

MISO

 

 

 

 

 

 

 

 

 

(P3.0) (P3.1)

SDATA

(P3.3)

 

MicroConverter is a registered trademark of Analog Devices, Inc.

I2C is a registered trademark of Philips Corporation.

SPI is a registered trademark of Motorola Inc.

REV. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

www.analog.com

Fax: 781/326-8703

© Analog Devices, Inc., 2001

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Contents General Description Functional Block DiagramADuC812 Table of ContentsCalibrated Endpoint ERRORS5 ADC Channel Specifications DC ACCURACY3Temperature SENSOR10 DAC Channel Specifications DC ACCURACY11FLASH/EE Memory Performance CHARACTERISTICS12 DAC AC CharacteristicsWatchdog Timer Characteristics Power Supply Monitor CharacteristicsDigital Outputs Power REQUIREMENTS14, 15Isource = 80 ∝A Isource = 20 ∝APIN Configuration Temperature Package Model Range Description OptionOrdering Guide Mnemonic Type Function DAC Specifications ADC SpecificationsTerminology Thus for a 12-bit converter, this is 74 dBMemory Organization ARCHITECTURE, Main FeaturesBit Name Description Special Function Registers Default Value SFR Address SFR NotesGeneral Overview ADC Circuit InformationADC Transfer Function Typical OperationAQ1 EFHAQ0 #ADC Clks ADCCON1.1 T2CCS3 CS2 CS1 CS0 CH# Location Name DescriptionBit Location Status Description Driving the A/D Converter Op Amp Model CharacteristicsTable VI. Some Single-Supply Op Amps ADC DMA Mode Configuring the ADCVoltage Reference Connections External memory must be preconfigured. This consists Where the ADC Results are to be written. This is done byDMAP. Dmal must be written to first, followed by Dmah and then by DmapByte Program Sequence SFR areaNonvolatile Flash Memory B9H EconEadrl C6HCommand Byte Command Mode Mode FDHRNG1 RNG0Resistor String DAC Functional Equivalent Using the D/A ConverterSource and Sink Current Capability with Vref = VDD = 3 PRE2 C0HPRE1 PRE0 PRE2 WDR1DCH DFHCMP PsmiOOH F8HIspi WcolSPR0 SPR1SPR1 SPR0 F7H2C Control Register I2CCONCompatible ON-CHIP Peripherals Pin Alternate FunctionT2CON TMOD, TconTR1 TF1TF0 TR0Mode 3 Two 8-Bit Timer/Counters TIMER/COUNTER 0 and 1 Operating ModesMode 1 16-Bit Timer/Counter TF2 C8HEXF2 RclkRclk or Tclk CAP2 TR2 ModeOFF SM1 SM0SM0 SM1 SM2Baud rate in Mode 0 is fixed CLK SmodRCAP2H RCAP2L Eadc A8HET2 ET1Source Vector Address Source Priority DescriptionClock Oscillator ADuC812 Hardware Design ConsiderationsExternal Memory Interface ADuC812-based system as well as during its normal power-on Down to 1.2 V or less. The timing diagram of illusLevel. The external POR circuit must be operational High it tracks the voltage on DVDD. These recommendationsIdle Mode Normal ModeVDD = 5 VDD = 3 Core NAs ⋅ Mclk +System Grounding Schemes Grounding and Board Layout RecommendationsOther Hardware Considerations In-Circuit Serial Download AccessEmbedded Serial Port Debugger ADSIM-Windows Simulator Quickstart Development SystemXTAL1 Width Low XTAL1 Period 83.33 62.5 1000XTAL1 Width High XTAL1 Rise TimeExternal Program Memory 12 MHz Variable Clock Parameter Min Max UnitExternal Data Memory Read Cycle External Data Memory Write Cycle Input Data Setup to Clock 300 2t CK + Output Data Setup to Clock 700 10t CKSerial Port Clock Cycle Time 12t CK Input Data Hold after ClockI2C-COMPATIBLE Interface Timing Parameter Min Max UnitParameter Min Typ Max Unit SPI Master Mode Timing Cpha =Data Output Setup before Sclock Edge 150 SS to Sclock Edge SPI Slave Mode Timing Cpha =SS High after Sclock Edge Data Output Valid after SS Edge Outline Dimensions Entire Data Sheet has been revisedLocation Data Sheet changed from REV. a to REV. B Lead Plastic Quad Flatpack
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