Agilent Technologies FS2331 user manual Logic Analyzer Card Requirements, 16753/4/5/6, Recommended

Page 15

Logic Analyzer Card Requirements

DDR Bus

Speed

16700 Analyzer

Type

Timing Analysis

State Analysis

 

200MHz

16717/8/9

2 cards configured

3 cards:

 

(PC1600)

 

as one module with

1 card module with one

 

 

 

one timing machine

 

167Mhz state machine for

 

 

 

 

 

Commands

 

 

 

 

2 card module with one

 

 

 

 

 

333Mhz state machine for

 

 

 

 

 

Data

 

 

1675X

2 cards configured

2 cards configured into one

 

 

 

as one module with

module having two 200Mhz

 

 

 

one timing machine

machines, one with 2 pods for

 

 

 

 

commands, one with 6 pods for

 

 

 

 

Data.

 

 

 

 

 

 

266MHz

16717/8/9

2 cards configured

3 cards:

 

(PC2100)

 

as one module, one

1 card module with one

 

 

 

machine

 

167Mhz state machine for

 

 

 

 

 

Commands

 

 

 

 

2 card module with one

 

 

 

 

 

333Mhz state machine for

 

 

 

 

 

Data

 

 

 

 

 

 

 

1675X

2 cards configured

3 cards:

 

 

 

as one module, one

1 card module with one

 

 

 

machine

 

200Mhz state machine for

 

 

 

 

 

Commands

 

 

 

 

2 card module with one

 

 

 

 

 

400Mhz state machine for

 

 

 

 

 

Data

 

 

 

 

 

 

 

16760

4 cards configured

5 cards:

 

 

 

as one module, one

§ 1 card module at 200 Mb/s

 

 

 

machine

 

 

 

 

 

for commands.

 

 

 

 

4 card module at 400 Mb/s

 

 

 

 

 

for Data.

 

 

 

 

 

 

333MHz

16753/4/5/6

2 cards configured

3 cards:

 

(PC2700)

recommended

as one module, one

1 card module with one

 

 

 

machine

 

200Mhz state machine for

 

 

 

 

 

Commands

 

 

 

 

2 card module with one

 

 

 

 

 

400Mhz state machine for

 

 

 

 

 

Data

 

 

 

 

 

 

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Contents Revision DDR Sdram Analysis Probe FS2331How to reach us Product Warranty Signal Connections For Sales and Marketing Support For Technical SupportProduct Warranty Limitation of warrantyExclusive Remedies Logic Analyzer Modules Probe Cable, Connector NumberingIntroduction DefinitionsFS2331 100 pin Connector to Pod Diagram Probe Feature Summary FS2331 Probe DescriptionProbe Components DDR Data DDR CommandsProbe Design State Clock GenerationPage Pod Clock Domain Clock Rate Probe Pod AssignmentSwitch # Default factory Function Position Probe Switch SettingsOn closed Logic Analyzer Signal Threshold Voltage Settings Connecting the Probe to the Logic AnalyzerConnecting Power to the FS2331 Probe Card Requirements for PC2700 Systems Logic Analyzer Card Requirements 16753/4/5/6Recommended 169xx Licensing Setting up the 167xx AnalyzerSetting up the 169xx Analyzer Software Requirements System SoftwareTiming Analysis All DDR speeds and supported analyzer cards Card Configurations for State Analysis Probing multiple DDR busses Interleaved memory If User is dedicating a Connecting to your Target System Chip Select§ Isolate the Dedicated DIMM’s pin Chip Select Jumper locations§ Sleeve the Pin Unused Pods § Wire from the adjacent Dimm slot to the isolated pinOffline Analysis Filtering Taking a Trace, Triggering, and Seeing Measurement Results Loading the Inverse Assembler and Decoding DDR CommandsTiming Analysis Operation State Analysis OperationInverse Assembler and Decoding DDR Commands Tracing the Serial Presence Detect Signals Using Eye Finder with the FS2331 DDR Probe Using EyeScan with the FS2331 Probe Dimm Signal Loading Option Using the FS2331 DDR Probe with an Interposer FS1024/25FS2331 Calibration Page Set Command sample position Page Page Write Burst Data Valid Position Page Page Page Read Burst Data Valid Position Page Page Page Set the final analyzer sample position Adjust the delay line value to maximize R/W overlapPage Standards supported General InformationSamtec Signal Connections J1 DataSA0 CB4 J2 Data and CommandSpare J3 Command and Data Buffcmdclk DM5DQS14 J4 DataDQS7