Agilent Technologies FS2331 user manual How to reach us Product Warranty

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How to reach us	4
Product Warranty	5
Limitation of warranty	5
Exclusive Remedies	5
Assistance	5
Introduction	6
Definitions	6
DDR Bus Speed	6
Probe Cable, Connector Numbering	6
Logic Analyzer Modules	6
Logic Analyzer Machines	6
FS2331 Probe Description	8
Probe Feature Summary	8
Probe Components	8
Probe Design	9
State Clock Generation	9
DDR Commands	9
DDR Data	9
Probe Pod Assignment	11
Probe Switch Settings	12
Logic Analyzer Signal Threshold Voltage Settings	13
Connecting the Probe to the Logic Analyzer	13
Connecting Power to the FS2331 Probe	13
Card Requirements for PC2700 Systems	14
Logic Analyzer Card Requirements	15
Software Requirements	16
System Software	16
Setting up the 167xx Analyzer	16
Setting up the 169xx Analyzer	16
169xx Licensing	16
Loading 169xx configuration files and define probes feature	16
Configuration Files	17
Timing Analysis (All DDR speeds and supported analyzer cards)	17
3 card Configurations for State Analysis	18
Probing multiple DDR busses – Interleaved memory	19
Connecting to your Target System – Chip Select	20
Chip Select Jumpers	20
1) Wiring Chip Select from a DIMM module to the FS2331	20
2) Dedicating a DIMM slot to the FS2331	21
3) FS1024 or FS1025 Interposer	23
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Contents DDR Sdram Analysis Probe FS2331 RevisionHow to reach us Product Warranty Signal Connections For Technical Support For Sales and Marketing SupportExclusive Remedies Product WarrantyLimitation of warranty Definitions Probe Cable, Connector NumberingIntroduction Logic Analyzer ModulesFS2331 100 pin Connector to Pod Diagram Probe Components Probe Feature SummaryFS2331 Probe Description State Clock Generation DDR CommandsProbe Design DDR DataPage Probe Pod Assignment Pod Clock Domain Clock RateOn closed Switch # Default factory Function PositionProbe Switch Settings Connecting Power to the FS2331 Probe Logic Analyzer Signal Threshold Voltage SettingsConnecting the Probe to the Logic Analyzer Card Requirements for PC2700 Systems Recommended Logic Analyzer Card Requirements16753/4/5/6 Software Requirements System Software Setting up the 167xx AnalyzerSetting up the 169xx Analyzer 169xx LicensingTiming Analysis All DDR speeds and supported analyzer cards Card Configurations for State Analysis Probing multiple DDR busses Interleaved memory Connecting to your Target System Chip Select If User is dedicating aChip Select Jumper locations § Isolate the Dedicated DIMM’s pin§ Sleeve the Pin § Wire from the adjacent Dimm slot to the isolated pin Unused PodsOffline Analysis Filtering State Analysis Operation Loading the Inverse Assembler and Decoding DDR CommandsTiming Analysis Operation Taking a Trace, Triggering, and Seeing Measurement ResultsInverse Assembler and Decoding DDR Commands Tracing the Serial Presence Detect Signals Using Eye Finder with the FS2331 DDR Probe Using EyeScan with the FS2331 Probe Using the FS2331 DDR Probe with an Interposer FS1024/25 Dimm Signal Loading OptionFS2331 Calibration Page Set Command sample position Page Page Write Burst Data Valid Position Page Page Page Read Burst Data Valid Position Page Page Page Adjust the delay line value to maximize R/W overlap Set the final analyzer sample positionPage General Information Standards supportedSignal Connections J1 Data SamtecSA0 J2 Data and Command CB4Spare J3 Command and Data Buffcmdclk J4 Data DM5DQS14DQS7