Agilent Technologies FS2331 user manual

Page 36

∙Not all of the Address lines had activity. This is indicated by the “I” symbol. To see which lines had no activity, place the cursor on the Address label and click the right mouse button. Select the “Expand” pick to see the Eye Finder measurement for each Address line.

∙Several other lines had no activity. For this measurement none of the Chip Select lines were hooked up, so they had no activity and so showed themselves as stable for all time.

It would be OK to simply use the analyzer sample positions calculated by Eye Finder using this stimulus. However, you have the option of adjusting the actual sample positions. The following display shows how the sample positions were adjusted to be closer to the same value for use in sampling the Command bus. This was done more for aesthetic reasons than anything else. The Address bus is shown as a “stack of channels”, which is a convenient way of seeing the individual bits of a label at once. It is selected from the right clock pull down menu.

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Contents DDR Sdram Analysis Probe FS2331 RevisionHow to reach us Product Warranty Signal Connections For Technical Support For Sales and Marketing SupportProduct Warranty Limitation of warrantyExclusive Remedies Probe Cable, Connector Numbering IntroductionDefinitions Logic Analyzer ModulesFS2331 100 pin Connector to Pod Diagram Probe Feature Summary FS2331 Probe DescriptionProbe Components DDR Commands Probe DesignState Clock Generation DDR DataPage Probe Pod Assignment Pod Clock Domain Clock RateSwitch # Default factory Function Position Probe Switch SettingsOn closed Logic Analyzer Signal Threshold Voltage Settings Connecting the Probe to the Logic AnalyzerConnecting Power to the FS2331 Probe Card Requirements for PC2700 Systems Logic Analyzer Card Requirements 16753/4/5/6Recommended Setting up the 167xx Analyzer Setting up the 169xx AnalyzerSoftware Requirements System Software 169xx LicensingTiming Analysis All DDR speeds and supported analyzer cards Card Configurations for State Analysis Probing multiple DDR busses Interleaved memory Connecting to your Target System Chip Select If User is dedicating aChip Select Jumper locations § Isolate the Dedicated DIMM’s pin§ Sleeve the Pin § Wire from the adjacent Dimm slot to the isolated pin Unused PodsOffline Analysis Filtering Loading the Inverse Assembler and Decoding DDR Commands Timing Analysis OperationState Analysis Operation Taking a Trace, Triggering, and Seeing Measurement ResultsInverse Assembler and Decoding DDR Commands Tracing the Serial Presence Detect Signals Using Eye Finder with the FS2331 DDR Probe Using EyeScan with the FS2331 Probe Using the FS2331 DDR Probe with an Interposer FS1024/25 Dimm Signal Loading OptionFS2331 Calibration Page Set Command sample position Page Page Write Burst Data Valid Position Page Page Page Read Burst Data Valid Position Page Page Page Adjust the delay line value to maximize R/W overlap Set the final analyzer sample positionPage General Information Standards supportedSignal Connections J1 Data SamtecSA0 J2 Data and Command CB4Spare J3 Command and Data Buffcmdclk J4 Data DM5DQS14DQS7