Agilent Technologies FS2331 user manual General Information, Standards supported

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General Information

This chapter provides additional reference information including the characteristics and signal connections for the FS2331 DDR Analysis Probe. The following operating characteristics are not specifications, but are typical operating characteristics for the HyperTransport Analysis Probe.

Probe Interface design capability

The FS2331 is designed to connect to a 184 pin DDR DIMM connector.

Standards supported

The FS2331 is designed to operate with PC1600, PC200, and PC2700 DDR DIMM standards for both buffered and unbuffered DIMM modules.

Power requirements

The probe requires approximately 3 amps of 3.3V. This is supplied by a dedicated AC to DC converter. Ground connections are provided through both the logic analyzer and the DIMM bus.

Logic Analyzer Requirements

The Agilent 16700 logic analyzer frame is required running software version 2.70 or higher. Several different logic analyzer cards can be used with the FS2331 depending on the DIMM bus speed being probed. See this User Manual for details.

Minimum Clock Period

The FS2331 is designed to be used at PC1600, PC2100, and PC2700 DIMM speeds. Operation at speeds higher than that may vary.

Signal Loading

The FS2331 is design to emulate the signal loading of a PC2700 Registered DIMM per the Rev. C raw card. Ref. JEDEC PC2700 Design spec. for more information.

Environmental Operating Limits

Temperature - Operating: +20° to +30° C (+68° to +86°F)

Non-operating: -40°to +75° C (-40°to +167° F)

Altitude

- Operating: 4,6000m (15,000 ft)

 

Non-operating: 15,3000m (50,000 ft)

Humidity

Up to 90% non-condensing. Avoid sudden, extreme temperature

changes that would cause condensation on the FS2331.

Servicing

If a failure is suspected in the FS2331 contact the factory or your FuturePlus Systems authorized distributor. The repair strategy is for the product to be returned to the factory upon factory approval.

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Contents Revision DDR Sdram Analysis Probe FS2331How to reach us Product Warranty Signal Connections For Sales and Marketing Support For Technical SupportExclusive Remedies Product WarrantyLimitation of warranty Logic Analyzer Modules Probe Cable, Connector NumberingIntroduction DefinitionsFS2331 100 pin Connector to Pod Diagram Probe Components Probe Feature SummaryFS2331 Probe Description DDR Data DDR CommandsProbe Design State Clock GenerationPage Pod Clock Domain Clock Rate Probe Pod AssignmentOn closed Switch # Default factory Function PositionProbe Switch Settings Connecting Power to the FS2331 Probe Logic Analyzer Signal Threshold Voltage SettingsConnecting the Probe to the Logic Analyzer Card Requirements for PC2700 Systems Recommended Logic Analyzer Card Requirements16753/4/5/6 169xx Licensing Setting up the 167xx AnalyzerSetting up the 169xx Analyzer Software Requirements System SoftwareTiming Analysis All DDR speeds and supported analyzer cards Card Configurations for State Analysis Probing multiple DDR busses Interleaved memory If User is dedicating a Connecting to your Target System Chip Select§ Isolate the Dedicated DIMM’s pin Chip Select Jumper locations§ Sleeve the Pin Unused Pods § Wire from the adjacent Dimm slot to the isolated pinOffline Analysis Filtering Taking a Trace, Triggering, and Seeing Measurement Results Loading the Inverse Assembler and Decoding DDR CommandsTiming Analysis Operation State Analysis OperationInverse Assembler and Decoding DDR Commands Tracing the Serial Presence Detect Signals Using Eye Finder with the FS2331 DDR Probe Using EyeScan with the FS2331 Probe Dimm Signal Loading Option Using the FS2331 DDR Probe with an Interposer FS1024/25FS2331 Calibration Page Set Command sample position Page Page Write Burst Data Valid Position Page Page Page Read Burst Data Valid Position Page Page Page Set the final analyzer sample position Adjust the delay line value to maximize R/W overlapPage Standards supported General InformationSamtec Signal Connections J1 DataSA0 CB4 J2 Data and CommandSpare J3 Command and Data Buffcmdclk DM5DQS14 J4 DataDQS7
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