Agilent Technologies FS2331 user manual Set Command sample position

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Notice in this display the data valid windows for DATA31-0 and DATA64-32 are reduced in size. This is because the measured windows represent the intersection of the read and write windows.

Notice also that there is almost no data valid window for the strobes. This is unavoidable since the timing of the strobes still shift one quarter clock cycle between read and write bursts. The data valid window thus shrinks to the natural overlap of the strobe timings. Signal jitter in real systems usually reduces the window size to zero. Without the separate analyzer clock timing adjustment for read and write bursts the data valid window for all data lines would look very much like the strobes.

If the eyes for the data lines are less than .5 ns then adjustment of the Read delay line may be necessary. Also, if this probe is used at different DDR speeds (PC1600, PC2100, PC2700) adjustment of the Read delay line may be necessary as it is used at different speeds and/or in different systems. The FS2331 is provided with 2 delay lines, one of 1200ps (factory configuration) and another of 1700ps, which may be needed for operation in target systems with slower DIMM bus speeds.

These Delay Lines are very fragile. Be very careful when changing them.

The following procedure should be used to check the delay value. Depending on results, it may be appropriate to change the Read Delay value to the other value provided. If neither of these values provides the desired result, please contact FuturePlus Systems technical Support.

This procedure consists of the following steps:

1.Set the analyzer sample position for DDR commands.

2.Find the data valid window position for write bursts

3.Find the data valid window position for read bursts

4.Adjust the delay line value to maximize overlap between the write and read data valid windows.

5.Set the analyzer sample positions to the center of the combined read and write data valid windows.

Step 1 – Set Command sample position

For this step the memory bus should be actively carrying DDR commands. Ideally all the Chip Select lines, address lines, bank select lines, etc. should have activity. Once the stimulus is running, open the “Setup/Hold…” dialog under the Format tab of the analyzer receiving DDR commands (for example, slot C). Within the “Setup/Hold…” dialog select the “Eye Finder” option, and press the “Run Eye Finder” button. Eye Finder will take about 30 seconds or so to complete, at which time you should see a display something like the following:

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Contents DDR Sdram Analysis Probe FS2331 RevisionHow to reach us Product Warranty Signal Connections For Technical Support For Sales and Marketing SupportLimitation of warranty Product WarrantyExclusive Remedies Definitions Probe Cable, Connector NumberingIntroduction Logic Analyzer ModulesFS2331 100 pin Connector to Pod Diagram FS2331 Probe Description Probe Feature SummaryProbe Components State Clock Generation DDR CommandsProbe Design DDR DataPage Probe Pod Assignment Pod Clock Domain Clock RateProbe Switch Settings Switch # Default factory Function PositionOn closed Connecting the Probe to the Logic Analyzer Logic Analyzer Signal Threshold Voltage SettingsConnecting Power to the FS2331 Probe Card Requirements for PC2700 Systems 16753/4/5/6 Logic Analyzer Card RequirementsRecommended Software Requirements System Software Setting up the 167xx AnalyzerSetting up the 169xx Analyzer 169xx LicensingTiming Analysis All DDR speeds and supported analyzer cards Card Configurations for State Analysis Probing multiple DDR busses Interleaved memory Connecting to your Target System Chip Select If User is dedicating aChip Select Jumper locations § Isolate the Dedicated DIMM’s pin§ Sleeve the Pin § Wire from the adjacent Dimm slot to the isolated pin Unused PodsOffline Analysis Filtering State Analysis Operation Loading the Inverse Assembler and Decoding DDR CommandsTiming Analysis Operation Taking a Trace, Triggering, and Seeing Measurement ResultsInverse Assembler and Decoding DDR Commands Tracing the Serial Presence Detect Signals Using Eye Finder with the FS2331 DDR Probe Using EyeScan with the FS2331 Probe Using the FS2331 DDR Probe with an Interposer FS1024/25 Dimm Signal Loading OptionFS2331 Calibration Page Set Command sample position Page Page Write Burst Data Valid Position Page Page Page Read Burst Data Valid Position Page Page Page Adjust the delay line value to maximize R/W overlap Set the final analyzer sample positionPage General Information Standards supportedSignal Connections J1 Data SamtecSA0 J2 Data and Command CB4Spare J3 Command and Data Buffcmdclk J4 Data DM5DQS14DQS7
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