Agilent Technologies FS2331 § Wire from the adjacent Dimm slot to the isolated pin, Unused Pods

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§Wire from the adjacent DIMM slot to the isolated pin

Using a short length of rework wire connect the adjacent slot’s identical pin, e.g. pin 157 for S0, to the isolated pin on the dedicated DIMM slot.

3) FS1024 or FS1025 Interposer

Use of either of these interposers allows a single DIMM slot to support both the FS2331 probe and a DIMM module. The convenience of this approach can be offset by the impact of the additional etch length that the interposer provides. If an FS1024 or 1025 interposer is used, J5 jumpers should be configured per the previous table. This allows the FS2331 to use the Chip Select signals as seen by the DIMM module in the interposer. This does not provide Chip Select signals from any other DIMM slot. Please note that the jumper J10 on the FS2331 has to be removed when the probe is in the interposer in order to reduce loading on CK0.

Factory config is J10 jumper installed.

Unused Pods

Depending on the DDR bus speed being probed and the logic analyzer cards used, there may be unused pods. These pods may be used to trace other signals. You should remember to add the two pods to the machine (using the “Pod Assignment” dialog of the Format tab). You will also need to setup the format spec to map labels to these channels on the DDR probe.

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Contents Revision DDR Sdram Analysis Probe FS2331How to reach us Product Warranty Signal Connections For Sales and Marketing Support For Technical SupportExclusive Remedies Product WarrantyLimitation of warranty Logic Analyzer Modules Probe Cable, Connector NumberingIntroduction DefinitionsFS2331 100 pin Connector to Pod Diagram Probe Components Probe Feature SummaryFS2331 Probe Description DDR Data DDR CommandsProbe Design State Clock GenerationPage Pod Clock Domain Clock Rate Probe Pod AssignmentOn closed Switch # Default factory Function PositionProbe Switch Settings Connecting Power to the FS2331 Probe Logic Analyzer Signal Threshold Voltage SettingsConnecting the Probe to the Logic Analyzer Card Requirements for PC2700 Systems Recommended Logic Analyzer Card Requirements16753/4/5/6 169xx Licensing Setting up the 167xx AnalyzerSetting up the 169xx Analyzer Software Requirements System SoftwareTiming Analysis All DDR speeds and supported analyzer cards Card Configurations for State Analysis Probing multiple DDR busses Interleaved memory If User is dedicating a Connecting to your Target System Chip Select§ Isolate the Dedicated DIMM’s pin Chip Select Jumper locations§ Sleeve the Pin Unused Pods § Wire from the adjacent Dimm slot to the isolated pinOffline Analysis Filtering Taking a Trace, Triggering, and Seeing Measurement Results Loading the Inverse Assembler and Decoding DDR CommandsTiming Analysis Operation State Analysis OperationInverse Assembler and Decoding DDR Commands Tracing the Serial Presence Detect Signals Using Eye Finder with the FS2331 DDR Probe Using EyeScan with the FS2331 Probe Dimm Signal Loading Option Using the FS2331 DDR Probe with an Interposer FS1024/25FS2331 Calibration Page Set Command sample position Page Page Write Burst Data Valid Position Page Page Page Read Burst Data Valid Position Page Page Page Set the final analyzer sample position Adjust the delay line value to maximize R/W overlapPage Standards supported General InformationSamtec Signal Connections J1 DataSA0 CB4 J2 Data and CommandSpare J3 Command and Data Buffcmdclk DM5DQS14 J4 DataDQS7