Texas Instruments TMS320 specifications Data Memory Operations Mnemonic Description Words

Page 15

TMS320C25

SPRS010B Ð MAY 1987 Ð REVISED NOVEMBER 1990

Table 3. TMS320C25 Instruction Set Summary (continued)

BRANCH/CALL INSTRUCTIONS

MNEMONIC

DESCRIPTION

NO.

 

 

 

 

 

INSTRUCTION BIT CODE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

WORDS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B

Branch unconditionally

2

1

1

1

1

1

1

1

1

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BACC²

Branch to address specified by accumulator

1

1

1

0

0

1

1

1

0

0

0

1

0

0

1

0

1

BANZ

Branch on auxiliary register not zero

2

1

1

1

1

1

0

1

1

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BBNZ²

Branch if TC bit 0

2

1

1

1

1

1

0

0

1

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BBZ²

Branch if TC bit = 0

2

1

1

1

1

1

0

0

0

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BC³

Branch on carry

2

0

1

0

1

1

1

1

0

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BGEZ

Branch if accumulator 0

2

1

1

1

1

0

1

0

0

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BGZ

Branch if accumulator > 0

2

1

1

1

1

0

0

0

1

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BIOZ

Branch on I/O status = 0

2

1

1

1

1

1

0

1

0

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BLEZ

Branch if accumulator 0

2

1

1

1

1

0

0

1

0

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BLZ

Branch if accumulator < 0

2

1

1

1

1

0

0

1

1

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BNC³

Branch on no carry

2

0

1

0

1

1

1

1

1

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BNV²

Branch if no overflow

2

1

1

1

1

0

1

1

1

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BNZ

Branch if accumulator 0

2

1

1

1

1

0

1

0

1

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BV

Branch on overflow

2

1

1

1

1

0

0

0

0

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

BZ

Branch if accumulator = 0

2

1

1

1

1

0

1

1

0

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

CALA

Call subroutine indirect

1

1

1

0

0

1

1

1

0

0

0

1

0

0

1

0

0

CALL

Call subroutine

2

1

1

1

1

1

1

1

0

1

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

RET

Return from subroutine

1

1

1

0

0

1

1

1

0

0

0

1

0

0

1

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I/O AND DATA MEMORY OPERATIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MNEMONIC

DESCRIPTION

NO.

WORDS

 

 

 

 

 

 

BLKD²

Block move from data memory to data memory

2

BLKP²

Block move from program memory to data

2

memory

 

 

 

 

DMOV

Data move in data memory

1

FORT²

Format serial port registers

1

IN

Input data from port

1

OUT

Output data to port

1

RFSM³

Reset serial port frame synchronization mode

1

RTXM²

Reset serial port transmit mode

1

RXF²

Reset external flag

1

SFSM³

Set serial port frame synchronization mode

1

STXM²

Set serial port transmit mode

1

SXF²

Set external flag

1

TBLR

Table read

 

1

TBLW

Table write

 

1

 

 

 

 

 

 

 

 

 

 

INSTRUCTION BIT CODE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

1

1

0

1

1

 

0

1

I

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

1

1

1

1

1

1

 

0

0

I

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

0

1

0

1

0

1

 

1

0

I

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

1

1

0

0

1

1

 

1

0

0

0

0

0

1

1

1

FO

1

0

0

0

 

 

 

 

 

 

I

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PA

 

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

1

1

0

 

 

 

 

 

 

I

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PA

 

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

1

0

0

1

1

 

1

0

0

0

1

1

0

1

1

0

1

1

0

0

1

1

 

1

0

0

0

1

0

0

0

0

0

1

1

0

0

1

1

 

1

0

0

0

0

0

1

1

0

0

1

1

0

0

1

1

 

1

0

0

0

1

1

0

1

1

1

1

1

0

0

1

1

 

1

0

0

0

1

0

0

0

0

1

1

1

0

0

1

1

 

1

0

0

0

0

0

1

1

0

1

0

1

0

1

1

0

 

0

0

I

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

0

1

0

1

1

0

 

0

1

I

 

 

 

 

 

D

 

 

 

 

 

 

 

 

 

 

 

 

 

²These instructions are not included in the TMS320C1x instruction set. ³ These instructions are not included in the TMS32020 instruction set.

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Contents Description TMS320 SECOND-GENERATION Digital Signal ProcessorsSignals Definition PGA and PLCC/CER-QUAD PIN AssignmentsFunction PIN Introduction Wait States for Communication to Slower Off-Chip Key Features TMS32020Bit-Reversed Indexed-Addressing Mode for Memory SpaceType ArchitectureTMS320 Second-Generation Device Overview PackageSECOND-GENERATION Devices Functional block diagram TMS320C2xMemory control TimerScaling shifter 16 ⋅ 16-bit parallel multiplierMemory Maps TMS320 SECOND-GENERATION DevicesInterrupts and subroutines External interfaceMultiprocessing Repeat feature Instruction setAddressing modes Instruction Symbols Symbol DefinitionInstruction set summary TMS320C25 Instruction Set Summary ZAC SUBT²XOR XORK²LTP ² ApacLPH ² LTAData Memory Operations Mnemonic Description Words TMS320C25 Instruction Set Summary concluded TMS32020 Product Notification TMS32020Development support TMS320 Second-Generation Software and Hardware Support Software Tools Part NumberHardware Tools Part Number Documentation support Specification overviewRecommended operating conditions MIN NOM MAX UnitParameter Test Conditions MIN TYP§ MAX Unit Clock Characteristics and Timing Internal clock optionExternal clock option Test Load Circuit Parameter MIN TYP MAX Unit Memory and Peripheral Interface TimingRS, INT, BIO, and XF Timing Hold TimingHold Holda Serial Port Timing INT Clkin / Clkx / Clkr MP/MC IOHTMS320C25GBA Parameter Test Conditions MIN TYP MAX Unit Clkin External Clock OptionVOH Min TdC1L-AL Low after CLKOUT1 low Serial Port Timing IPP1 Eprom ProgrammingSee Notes 14 VPPINT0 INT2 VIH CLKIN, CLKX, ClkrMP/MC VIL CLKOUT1, CLKOUT2 Internal Clock Option External clock optionFcrystal TdC1-S From Clkout if Is present TsuIN Setup before CLKOUT1 high MIN TYP MAX Contrast Summary of Electrical SpecificationsClock characteristics and timing ParameterSerial port timing Memory and peripheral interface timingRS, INT, BIO, and XF timing Hold timingClock timing Timing DiagramsMemory read timing BR, PS, D SReady CLKOUT1 CLKOUT2 Strb Memory write timingMSC One wait-state memory access timingIack Reset timingInterrupt timing TMS320C25 Interrupt timing TMS32020Serial port transmit timing Serial port receive timingExternal flag timing BIO timingPC = N PC = N + Execute Hold timing part aHold HoldaHold timing part B CLKOUT1 CLKOUT2Holda Fetch Fetch Execute Or is D15-D0 TdHH-AH TMS320C25FNL Plcc reflow soldering precautions Typical Supply Current Characteristics for TMS320C25Mechanical Data Pin GB grid array ceramic package TMS32020, TMS320C25Parameter MAX Unit Advance Jedec NO. Outline Terminals MIN MAX Fast programming and verification Programming the TMS320E25 Eprom cellEPT VPP Pin Nomenclature TMS320E25VCC EPTErasure TMS320E25 Programming Mode LevelsSignal Program Read Output Name ² PIN Verify Inhibit DisableProgram verify Fast Programming FlowchartOutput disable ReadROM protection and verification VSS Clkin EPT VPP TMS320E25 Protect and Verify Eprom Mode LevelsEprom protect VIH VIL PGM VPP VCCRbit EpromVCC VIH VIL PGM VIH/VOH HI-Z VIL/VOL VPP EPT VSS VIH VIL VPP VCCTMS320 SECOND-GENERATION NIL Other Qualified Versions of TMS320C25 Packaging InformationImportant Notice