Texas Instruments TMS320 specifications Development support

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TMS320 SECOND-GENERATION

DEVICES

SPRS010B Ð MAY 1987 Ð REVISED NOVEMBER 1990

development support

Together, Texas Instruments and its authorized third-party suppliers offer an extensive line of development support products to assist the user in all aspects of TMS320 second-generation-based design and development. These products range from development and application software to complete hardware development and evaluation systems. Table 4 lists the development support products for the second-generation TMS320 devices.

System development may begin with the use of the simulator, Software Development System (SWDS), or emulator (XDS) along with an assembler/linker. These tools give the TMS320 user various means of evaluation, from software simulation of the second-generation TMS320s (simulator) to full-speed in-circuit emulation with hardware and software breakpoint trace and timing capabilities (XDS).

Software and hardware can be developed simultaneously by using the macro assembler/linker, C compiler, and simulator for software development, the XDS for hardware development, and the Software Development System for both software development and limited hardware development.

Many third-party vendors offer additional development support for the second-generation TMS320s, including assembler/linkers, simulators, high-level languages, applications software, algorithm development tools, application boards, software development boards, and in-circuit emulators. Refer to the TMS320 Family Development Support Reference Guide (SPRU011A) for further information about TMS320 development support products offered by both Texas Instruments and its third-party suppliers.

Additional support for the TMS320 products consists of an extensive library or product and applications documentation. Three-day DSP design workshops are offered by the TI Regional Technology Centers (RTCs). These workshops provide insight into the architecture and the instruction set of the second-generation TMS320s as well as hands-on training with the TMS320 development tools. When technical questions arise regarding the TMS320 family, contact the Texas Instruments TMS320 Hotline at (713) 274-2320. Or, keep informed on the latest TI and third-party development support tools by accessing the DSP Bulletin Board Service (BBS) at (713) 274-2323. The BBS serves 2400-, 1200- and 300-bps modems. Also, TMS320 application source code may be downloaded from the BBS.

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Contents TMS320 SECOND-GENERATION Digital Signal Processors DescriptionSignals Definition PGA and PLCC/CER-QUAD PIN AssignmentsFunction PIN Introduction Memory Space Key Features TMS32020Bit-Reversed Indexed-Addressing Mode for Wait States for Communication to Slower Off-ChipPackage ArchitectureTMS320 Second-Generation Device Overview TypeFunctional block diagram TMS320C2x SECOND-GENERATION Devices16 ⋅ 16-bit parallel multiplier TimerScaling shifter Memory controlTMS320 SECOND-GENERATION Devices Memory MapsInterrupts and subroutines External interfaceMultiprocessing Repeat feature Instruction setAddressing modes Instruction Symbols Symbol DefinitionInstruction set summary TMS320C25 Instruction Set Summary XORK² SUBT²XOR ZACLTA ApacLPH ² LTP ²Data Memory Operations Mnemonic Description Words TMS320C25 Instruction Set Summary concluded TMS32020 TMS32020 Product NotificationDevelopment support TMS320 Second-Generation Software and Hardware Support Software Tools Part NumberHardware Tools Part Number Specification overview Documentation supportRecommended operating conditions MIN NOM MAX UnitParameter Test Conditions MIN TYP§ MAX Unit Clock Characteristics and Timing Internal clock optionExternal clock option Test Load Circuit Memory and Peripheral Interface Timing Parameter MIN TYP MAX UnitRS, INT, BIO, and XF Timing Hold TimingHold Holda Serial Port Timing INT Clkin / Clkx / Clkr MP/MC IOHTMS320C25GBA Parameter Test Conditions MIN TYP MAX Unit External Clock Option ClkinVOH Min TdC1L-AL Low after CLKOUT1 low Serial Port Timing VPP Eprom ProgrammingSee Notes 14 IPP1INT0 INT2 VIH CLKIN, CLKX, ClkrMP/MC VIL Internal Clock Option External clock option CLKOUT1, CLKOUT2Fcrystal TdC1-S From Clkout if Is present TsuIN Setup before CLKOUT1 high Parameter Contrast Summary of Electrical SpecificationsClock characteristics and timing MIN TYP MAXHold timing Memory and peripheral interface timingRS, INT, BIO, and XF timing Serial port timingTiming Diagrams Clock timingMemory read timing BR, PS, D SReady Memory write timing CLKOUT1 CLKOUT2 StrbOne wait-state memory access timing MSCReset timing IackInterrupt timing TMS32020 Interrupt timing TMS320C25Serial port receive timing Serial port transmit timingBIO timing External flag timingPC = N PC = N + Holda Hold timing part aHold ExecuteHold timing part B CLKOUT1 CLKOUT2Holda Fetch Fetch Execute Or is D15-D0 TdHH-AH Typical Supply Current Characteristics for TMS320C25 TMS320C25FNL Plcc reflow soldering precautionsMechanical Data Pin GB grid array ceramic package TMS32020, TMS320C25Parameter MAX Unit Advance Jedec NO. Outline Terminals MIN MAX Programming the TMS320E25 Eprom cell Fast programming and verificationEPT Pin Nomenclature TMS320E25VCC EPT VPPProgram Read Output Name ² PIN Verify Inhibit Disable TMS320E25 Programming Mode LevelsSignal ErasureFast Programming Flowchart Program verifyOutput disable ReadROM protection and verification VIH VIL PGM VPP VCC TMS320E25 Protect and Verify Eprom Mode LevelsEprom protect VSS Clkin EPT VPPEprom RbitVIH VIL VPP VCC VCC VIH VIL PGM VIH/VOH HI-Z VIL/VOL VPP EPT VSSTMS320 SECOND-GENERATION NIL Packaging Information Other Qualified Versions of TMS320C25Important Notice
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