Texas Instruments specifications Packaging Information, Other Qualified Versions of TMS320C25

Page 68

PACKAGE OPTION ADDENDUM

www.ti.com

4-May-2009

 

 

PACKAGING INFORMATION

Orderable Device

Status (1)

Package

Package

Pins Package Eco Plan (2)

Lead/Ball Finish

MSL Peak Temp (3)

 

 

Type

Drawing

 

Qty

 

 

 

TMS320C25FNA

NRND

PLCC

FN

68

18

Green (RoHS &

CU NIPDAU

Level-3-260C-168 HR

 

 

 

 

 

 

no Sb/Br)

 

 

TMS320C25FNAR

NRND

PLCC

FN

68

 

TBD

Call TI

Call TI

 

 

 

 

 

 

 

 

 

TMS320C25FNL

NRND

PLCC

FN

68

18

Green (RoHS &

CU NIPDAU

Level-3-260C-168 HR

 

 

 

 

 

 

no Sb/Br)

 

 

TMS320C25FNL33

OBSOLETE

PLCC

FN

68

 

TBD

Call TI

Call TI

 

 

 

 

 

 

 

 

 

TMS320C25FNLR

NRND

PLCC

FN

68

250

Green (RoHS &

CU NIPDAU

Level-3-260C-168 HR

 

 

 

 

 

 

no Sb/Br)

 

 

TMS320C25FNLW

OBSOLETE

PLCC

FN

68

 

Green (RoHS &

CU NIPDAU

Level-3-260C-168 HR

 

 

 

 

 

 

no Sb/Br)

 

 

TMS320C25GBA

NRND

CPGA

GB

68

21

TBD

AU

N / A for Pkg Type

 

 

 

 

 

 

 

 

 

TMS320C25GBL

NRND

CPGA

GB

68

21

TBD

AU

N / A for Pkg Type

TMS320C25PHL

NRND

QFP

PH

80

66

Green (RoHS &

CU NIPDAU

Level-4-260C-72 HR

 

 

 

 

 

 

no Sb/Br)

 

 

(1)The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF TMS320C25 :

•Military: SMJ320C25

NOTE: Qualified Version Definitions:

•Military - QML certified for Military and Defense Applications

Addendum-Page 1

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Contents TMS320 SECOND-GENERATION Digital Signal Processors DescriptionFunction PIN Signals DefinitionPGA and PLCC/CER-QUAD PIN Assignments Introduction Key Features TMS32020 Bit-Reversed Indexed-Addressing Mode forMemory Space Wait States for Communication to Slower Off-ChipArchitecture TMS320 Second-Generation Device OverviewPackage TypeFunctional block diagram TMS320C2x SECOND-GENERATION DevicesTimer Scaling shifter16 ⋅ 16-bit parallel multiplier Memory controlTMS320 SECOND-GENERATION Devices Memory MapsMultiprocessing Interrupts and subroutinesExternal interface Addressing modes Repeat featureInstruction set Instruction set summary Instruction SymbolsSymbol Definition TMS320C25 Instruction Set Summary SUBT² XORXORK² ZACApac LPH ²LTA LTP ²Data Memory Operations Mnemonic Description Words TMS320C25 Instruction Set Summary concluded TMS32020 TMS32020 Product NotificationDevelopment support Hardware Tools Part Number TMS320 Second-Generation Software and Hardware SupportSoftware Tools Part Number Specification overview Documentation supportParameter Test Conditions MIN TYP§ MAX Unit Recommended operating conditionsMIN NOM MAX Unit External clock option Clock Characteristics and TimingInternal clock option Test Load Circuit Memory and Peripheral Interface Timing Parameter MIN TYP MAX UnitHold Holda RS, INT, BIO, and XF TimingHold Timing Serial Port Timing TMS320C25GBA INT Clkin / Clkx / ClkrMP/MC IOH Parameter Test Conditions MIN TYP MAX Unit External Clock Option ClkinVOH Min TdC1L-AL Low after CLKOUT1 low Serial Port Timing Eprom Programming See Notes 14VPP IPP1MP/MC VIL INT0 INT2 VIHCLKIN, CLKX, Clkr Internal Clock Option External clock option CLKOUT1, CLKOUT2Fcrystal TdC1-S From Clkout if Is present TsuIN Setup before CLKOUT1 high Contrast Summary of Electrical Specifications Clock characteristics and timingParameter MIN TYP MAXMemory and peripheral interface timing RS, INT, BIO, and XF timingHold timing Serial port timingTiming Diagrams Clock timingReady Memory read timingBR, PS, D S Memory write timing CLKOUT1 CLKOUT2 StrbOne wait-state memory access timing MSCReset timing IackInterrupt timing TMS32020 Interrupt timing TMS320C25Serial port receive timing Serial port transmit timingBIO timing External flag timingPC = N PC = N + Hold timing part a HoldHolda ExecuteHolda Fetch Hold timing part BCLKOUT1 CLKOUT2 Fetch Execute Or is D15-D0 TdHH-AH Typical Supply Current Characteristics for TMS320C25 TMS320C25FNL Plcc reflow soldering precautionsParameter MAX Unit Mechanical DataPin GB grid array ceramic package TMS32020, TMS320C25 Advance Jedec NO. Outline Terminals MIN MAX Programming the TMS320E25 Eprom cell Fast programming and verificationPin Nomenclature TMS320E25 VCCEPT EPT VPPTMS320E25 Programming Mode Levels SignalProgram Read Output Name ² PIN Verify Inhibit Disable ErasureFast Programming Flowchart Program verifyROM protection and verification Output disableRead TMS320E25 Protect and Verify Eprom Mode Levels Eprom protectVIH VIL PGM VPP VCC VSS Clkin EPT VPPEprom RbitVIH VIL VPP VCC VCC VIH VIL PGM VIH/VOH HI-Z VIL/VOL VPP EPT VSSTMS320 SECOND-GENERATION NIL Packaging Information Other Qualified Versions of TMS320C25Important Notice
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