AMD SC2200 manual Video Block, Video Input Formatter, Line Buffer

Video Processor Module 32580B

7.2.2Video Block

The Video block receives video data from the VIP block or the GX1 module’s video frame buffer. The video data is for- matted and scaled and then sent to the Mixer/Blender. The video data also changes clock domains while in the Video block. It is clocked in with the GX1 module’s video clock and it is clocked out with the GX1 module’s graphics clock. A diagram of the Video block is shown in Figure 7-7.

7.2.2.1Video Input Formatter

The Video Input Formatter accepts video data 8 bits at a time in YUV 4:2:2, YUV 4:2:0, or RGB 6:5:6 format. The GX1 module’s video clock is the source clock. The data can be interlaced or progressive. When the data comes directly from the VIP block it is usually interlaced. The video format is configured via the EN_42X bit (F4BAR0+Memory Offset 00h[28] and the GV_SEL bit (F4BAR0+Memory Offset 4Ch[13]). The byte order for each format is configured in the VID_FMT bits (F4BAR0+Offset 00h[3:2]).

Video Input

Direct GX1

Video Module

8 8

RGB 5:6:5 – For this format each pixel is described as a

16-bit value:

Bits [15:11] = Red

Bits [10:5] = Green

Bits [4:0] = Blue

YUV 4:2:0 – This format is not supported by the GX1 mod- ule. The Horizontal Downscaler in the Video block cannot be used if the video data is in this format. In this format, 4 bytes of data are used to describe two pixels. The 4 bytes contain two Y values one for each pixel; one U and one V for both pixels. For each horizontal line, all the Y values are received first. The U values are received next and the V values are received last. For example for a horizontal line that has 720 pixels, there are 720 bytes of Y, followed by 360 bytes of U, followed by 360 bytes of V.

YUV 4:2:2 – In this format each DWORD in the horizontal line represent two pixels. There are two Y values and one each U and V in a DWORD. Just as in the YUV 4:2:0 for- mat, each U and V value describes the two pixels.

Video Input

Formatter

4-Tap Horizontal

Downscaler

m1

m+1 or m+1

Line Buffer 0

Line Buffer 1

Line Buffer 2

(3x360x32 bit) (4:2:2 or 4:2:0)

Formatter

4:4:4

24 24

2-Tap Vertical

Interpolating Upscaler

24

2-Tap Horizontal

Interpolating Upscaler

YUV 4:4:4/RGB 5:6:5

Figure 7-7. Video Block Diagram

AMD Geode™ SC2200 Processor Data Book 327