AMD SC2200 manual Operating Conditions, Symbol Parameter Min Typ Max Unit Comments, 370

32580B Electrical Specifications

9.1.4Operating Conditions

Table 9-3lists the various power supplies of the SC2200 and provides the device operating conditions.-

Table 9-3. Operating Conditions

Symbol
(Note 1)	Parameter	Min	Typ	Max	Unit	Comments
TC	Operating case temperature	0	-	85	oC
AVCCUSB	Analog power supply. Powers internal analog cir-	3.14	3.3	3.46	V
AVCCCRT	cuits and some external signals (see Table 9-4).
VBAT	Battery supply voltage. Powers RTC and ACPI	2.4	3.0	3.46	V
	when VBAT is greater than VSB (by at least 0.5V),
	and some external signals (see Table 9-4).
VIO	I/O buffer power supply. Powers most of the	3.14	3.3	3.46	V
	external signals (see Table 9-4); certain signals
	within this power plane are 5V tolerant.
VCORE	Core processor and internal digital power supply. Powers internal digital logic, including internal frequency
	multipliers.
	233 or 266 MHz	1.71	1.8	1.89	V
	300 MHz	1.99	2.1	2.21	V
VPLL2	PLL. Internal Phase Locked Loops (PLLs) power	3.14	3.3	3.46	V
VPLL3	supply.
VSB	Standby power supply. Powers RTC and ACPI	3.14	3.3	3.46	V
	when VSB is greater than VBAT-0.5V, and some
	external signals (see Table 9-4).
VSBL	Standby logic. Powers internal logic needed to support Standby VSB. VSBL requires a 0.1 µF bypass capac-
	itor to VSS.
	233 or 266 MHz	1.71	1.8	1.89	V
	300 MHz	1.99	2.1	2.21	V
VCCCRT	CRT DAC. Powers CRT DAC digital circuits.
	233 or 266 MHz	1.71	1.8	1.89	V
	300 MHz	1.99	2.1	2.21	V

Note 1. For VIH (Input High Voltage), VIL (Input Low Voltage), IOH (Output High Current), and IOL (Output Low Current) op- erating conditions refer to Section 9.2 "DC Characteristics" on page 379.

Notes:

1)All power sources except VBAT must be connected, even if the function is not used.

2)VSB and VSBL must be on if any other voltage is applied. VSB and VBAT voltages can be applied sepa- rately. See Section 9.3.15 "Power-Up Sequencing" on page 439.

3)The power planes of the SC2200 can be turned on or off. For more information, see Section 6.2.9 "Power Management Logic" on page 166.

4)It is recommended that the voltage difference between

VCCCRT, VCORE and VSBL be less than 0.25V, in order to reduce leakage current. If the voltage difference exceeds 0.25V, excessive leakage current is used in gates that are connected on the boundary between voltage domains.

5)It is recommended that the voltage difference between

VIO and VSB be less than 0.25V, in order to reduce leakage current. If the voltage difference exceeds 0.25V, excessive leakage current is used in gates that are connected on the boundary between voltage domains.

370 AMD Geode™ SC2200 Processor Data Book