AMD SC2200 manual PLL3

	32580B	List of Tables
Table 9-9.	Balls with PU/PD Resistors	. . . . . . 375
Table 9-10.	PLL4 (48 MHz)	. . . . . . 376
Table 9-11.	PLL3	. . . . . . 376
Table 9-12.	PLL6 (57.273 MHz)	. . . . . . 377
Table 9-13.	PLL2 Characteristics	. . . . . . 377
Table 9-14.	PLL5 (66.67 MHz)	. . . . . . 378
Table 9-15.	Buffer Types	. . . . . . 379
Table 9-16.	Default Levels for Measurement of Switching Parameters	. . . . . . 384
Table 9-17.	Memory Controller Timing Parameters	. . . . . . 386
Table 9-18.	Video Input Port Timing Parameters	. . . . . . 388
Table 9-19.	TFT Timing Parameters	. . . . . . 389
Table 9-20.	CRT VESA Compatible DAC (RED, GREEN, and BLUE Outputs)	. . . . . . 390
Table 9-21.	ACCESS.bus Input Timing Parameters	. . . . . . 391
Table 9-22.	ACCESS.bus Output Timing Parameters	. . . . . . 391
Table 9-23.	PCI AC Specifications	. . . . . . 394
Table 9-24.	PCI Clock Parameters	. . . . . . 396
Table 9-25.	PCI Timing Parameters	. . . . . . 397
Table 9-26.	Measurement Condition Parameters	. . . . . . 398
Table 9-27.	Sub-ISA Timing Parameters	. . . . . . 400
Table 9-28.	LPC and SERIRQ Timing Parameters	. . . . . . 404
Table 9-29.	IDE General Timing Parameters	. . . . . . 405
Table 9-30.	IDE Register Transfer to/from Device Timing Parameters	. . . . . . 406
Table 9-31.	IDE PIO Data Transfer to/from Device Timing Parameters	. . . . . . 408
Table 9-32.	IDE Multiword DMA Data Transfer Timing Parameters	. . . . . . 410
Table 9-33.	IDE UltraDMA Data Burst Timing Parameters	. . . . . . 412
Table 9-34.	USB Timing Parameters	. . . . . . 423
Table 9-35.	UART, Sharp-IR, SIR, and Consumer Remote Control Timing Parameters	. . . . . . 427
Table 9-36.	Fast IR Port Timing Parameters	. . . . . . 428
Table 9-37.	Standard Parallel Port Timing Parameters	. . . . . . 429
Table 9-39.	ECP Forward Mode Timing Parameters	. . . . . . 431
Table 9-40.	ECP Reverse Mode Timing Parameters	. . . . . . 432
Table 9-41.	AC Reset Timing Parameters	. . . . . . 433
Table 9-42.	AC97 Sync Timing Parameters	. . . . . . 433
Table 9-43.	AC97 Clocks Parameters	. . . . . . 434
Table 9-44.	AC97 I/O Timing Parameters	. . . . . . 435
Table 9-45.	AC97 Signal Rise and Fall Timing Parameters	. . . . . . 436
Table 9-46.	AC97 Low Power Mode Timing Parameters	. . . . . . 437
Table 9-47.	PWRBTN# Timing Parameters	. . . . . . 438
Table 9-48.	Power Management Event (GPWIO) and ONCTL# Timing Parameters	. . . . . . 438
Table 9-49.	Power-Up Sequence Using the Power Button Timing Parameters	. . . . . . 439
Table 9-50.	Power-Up Sequence Not Using the Power Button Timing Parameters	. . . . . . 440
Table 9-51.	JTAG Timing Parameters	. . . . . . 441
Table 10-1.	qJC (×C/W)	. . . . . . 443
Table 10-2.	Case-to-Ambient Thermal Resistance Example @ 85×C	. . . . . . 443
Table A-1.	Revision History	. . . . . . 448
Table A-2.	Edits to Current Revision	. . . . . . 449

12 AMD Geode™ SC2200 Processor Data Book