List of Tables

32580B

 

Table 6-21.

F2BAR4: IDE Controller Support Registers Summary

191

Table 6-22.

F3: PCI Header Registers for Audio Support Summary

191

Table 6-23.

F3BAR0: Audio Support Registers Summary

192

Table 6-24.

F5: PCI Header Registers for X-Bus Expansion Support Summary

193

Table 6-25.

F5BAR0: I/O Control Support Registers Summary

193

Table 6-26.

PCIUSB: USB PCI Configuration Register Summary

194

Table 6-27.

USB_BAR: USB Controller Registers Summary

195

Table 6-28.

ISA Legacy I/O Register Summary

196

Table 6-29.

F0: PCI Header/Bridge Configuration Registers for GPIO and LPC Support

198

Table 6-30.

F0BAR0+I/O Offset: GPIO Configuration Registers

233

Table 6-31.

F0BAR1+I/O Offset: LPC Interface Configuration Registers

237

Table 6-32.

F1: PCI Header Registers for SMI Status and ACPI Support

245

Table 6-33.

F1BAR0+I/O Offset: SMI Status Registers

246

Table 6-34.

F1BAR1+I/O Offset: ACPI Support Registers

255

Table 6-35.

F2: PCI Header/Channels 0 and 1 Registers for IDE Controller Configuration

266

Table 6-36.

F2BAR4+I/O Offset: IDE Controller Configuration Registers

270

Table 6-37.

F3: PCI Header Registers for Audio Configuration

272

Table 6-38.

F3BAR0+Memory Offset: Audio Configuration Registers

273

Table 6-39.

F5: PCI Header Registers for X-Bus Expansion

287

Table 6-40.

F5BAR0+I/O Offset: X-Bus Expansion Registers

290

Table 6-41.

PCIUSB: USB PCI Configuration Registers

292

Table 6-42.

USB_BAR+Memory Offset: USB Controller Registers

295

Table 6-43.

DMA Channel Control Registers

305

Table 6-44.

DMA Page Registers

310

Table 6-45.

Programmable Interval Timer Registers

311

Table 6-46.

Programmable Interrupt Controller Registers

313

Table 6-47.

Keyboard Controller Registers

316

Table 6-48.

Real-Time Clock Registers

317

Table 6-49.

Miscellaneous Registers

317

Table 7-1.

Valid Mixing/Blending Configurations

331

Table 7-2.

Truth Table for Alpha Blending

333

Table 7-3.

F4: PCI Header Registers for Video Processor Support Summary

338

Table 7-4.

F4BAR0: Video Processor Configuration Registers Summary

338

Table 7-5.

F4BAR2: VIP Support Registers Summary

340

Table 7-6.

F4: PCI Header Registers for Video Processor Support Registers

341

Table 7-7.

F4BAR0+Memory Offset: Video Processor Configuration Registers

343

Table 7-8.

F4BAR2+Memory Offset: VIP Configuration Registers

360

Table 8-1.

JTAG Mode Instruction Support

365

Table 8-2.

Test Modes

366

Table 8-3.

Observe Clocks Mode

366

Table 8-4.

Bypass Clocks Mode

366

Table 8-5.

Vodka_C Scan Clocks

367

Table 8-6.

Vodka Scan Chains

367

Table 8-7.

BhargavaB Scan Clocks

367

Table 8-8.

BhargavaB Scan Chains

367

Table 8-9.

Vodka Internal Test Modes

368

Table 8-10.

BhargavaB Internal Test Modes

368

Table 9-1.

Electro Static Discharge (ESD)

369

Table 9-2.

Absolute Maximum Ratings

369

Table 9-3.

Operating Conditions

370

Table 9-4.

Power Planes of External Interface Signals

371

Table 9-5.

System Conditions Used to Measure SC2200 Current During the On State

372

Table 9-6.

DC Characteristics for On State

372

Table 9-7.

DC Characteristics for Active Idle, Sleep, and Off States

373

Table 9-8.

Ball Capacitance and Inductance

374

AMD Geode™ SC2200 Processor Data Book

11

Page 11
Image 11
AMD SC2200 F2BAR4 IDE Controller Support Registers Summary, F3BAR0 Audio Support Registers Summary, DMA Page Registers