AMD SC2200 manual Top line is in even field. Default Top line is in odd field, 350

32580BVideo Processor Module - Video Processor Registers - Function 4

Table 7-7. F4BAR0+Memory Offset: Video Processor Configuration Registers (Continued)

Bit	Description
13	GV_SEL (GV Select). Selects input video format.
	0: YUV format.
	1: RGB format.
	Note:		Mixing and blending configurations are created using bits [13, 11:9] of this register. See Table 7-1 "Valid Mixing/
			Blending Configurations" on page 331.
			If this bit is set to 1, EN_42X (F4BAR0+Memory Offset 00h[28]) must be programmed to 0.
12	VID_LIN_INV (Video Line Invert). When this bit is set, it allows the video window to be positioned at odd offsets with
	respect to the first line. The values below are recommended if VID_Y_START (F4BAR0+Memory Offset 0Ch[10:0]) is an
	odd (set to 1) or even (set to 0) number of lines from the start of the active display.
	0:	Even.
	1: Odd.
11	Reserved. Set to 0.
10	CSC_FOR_VIDEO (Color Space Converter for Video). Determines whether or not the video stream from the video mod-
	ule is passed through the CSC.
	0: Disable. The video stream is sent "as is" to the video Mixer/Blender.
	1: Enable. The video stream is passed through the CSC (for YUV to RGB conversion).
	Note:		Mixing and blending configurations are created using bits [13, 11:9] of this register. See Table 7-1 "Valid Mixing/
			Blending Configurations" on page 331.
9	VIDEO_BLEND_MODE (Video Blending Mode). Allows selection of the type of video (i.e., interlaced or progressive) used
	for blending.
	0: Progressive video used for blending.
	1: Interlaced video used for blending.
	Note:		Mixing and blending configurations are created using bits [13, 11:9] of this register. See Table 7-1 "Valid Mixing/
			Blending Configurations" on page 331.
8	GFX_INS_VIDEO (Graphics Inside Video). This bit works in conjunction with bit COLOR_CHROMA_SEL (F4BAR0+Mem-
	ory Offset 4Ch[20]). COLOR_CHROMA_SEL selects whether the graphics is used for color keying or the video data stream
	is used for chroma keying. If COLOR_CHROMA_SEL = 0, graphics data is compared to the color key. If
	COLOR_CHROMA_SEL = 1, video data is compared to the chroma key.
	0: Outside the alpha windows, graphics or video is displayed depending on the result of the color key comparison.
	1: Outside the alpha windows, only video is displayed (if COLOR_CHROMA_SEL = 0) or only graphics is displayed (if
		COLOR_CHROMA_SEL = 1) color key comparison is not performed outside the alpha windows.
7	VID_WIN_PUSH_EN (Video Window Push Enable). Video window repositioning at an offset of 1 line below the pro-
	grammed value. Facilitates line rate matching in both fields.
	0:	Disable. (Default)
	1:	Enable.
6	TOP_LINE_IN_ODD (Top Line in Odd Field). Allows selection of what field the top line is in.
	0: Top line is in even field. (Default)
	1: Top line is in odd field.
5	Reserved.
4	INSERT_EN (Insert Enable). When this bit is set, the odd frame is shifted with respect to the even frame.
	0:	No shifting occurs.
	1: The odd frame is shifted according to the offset specified in bits [2:0].
3	Reserved.
2:0	OFFSET (Vertical Scaler Offset). For a non-interlaced video stream and when bob de-interlacing is used, program a value
	of 100 (i.e., shift one line); otherwise, leave at 000.
Offset 50h-53h			Cursor Color Key Register (R/W)	Reset Value: 00000000h
31:29	Reserved.
28:24	COLOR_REG_OFFSET (Cursor Color Register Offset). This field indicates a bit in the incoming graphics stream. It is
	used to indicate which of the two possible cursor color registers should be used for color key matches for the bits in the
	graphics stream.
350			AMD Geode™ SC2200 Processor Data Book