Instruction List (11)

S1C63000 Core CPU

Classification

Logic operation

Shift and rotate

8/16-bit transfer and operation

Mnemonic

 

 

Basic function

Opcode

Operand

 

 

[00addr6] ← [00addr6]∧not (2

 

 

)

CLR

[00addr6],imm2

imm2

 

 

 

 

 

 

 

 

 

 

[FFaddr6],imm2

[FFaddr6] ← [FFaddr6]∧not (2

imm2

)

SET

[00addr6],imm2

[00addr6] ← [00addr6]∨(2

imm2

)

 

 

 

 

 

 

 

 

 

 

 

 

[FFaddr6],imm2

[FFaddr6] ← [FFaddr6]∨(2

imm2

)

 

 

TST

[00addr6],imm2

[00addr6]∧(2

imm2

)

 

 

 

 

 

 

 

[FFaddr6],imm2

[FFaddr6]∧(2

imm2

)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SLL

%A

A (C←D3←D2←D1←D0←0)

 

 

 

 

 

%B

B (C←D3←D2←D1←D0←0)

 

 

 

 

 

[%X]

[X] (C←D3←D2←D1←D0←0)

 

 

 

[%X]+

[X] (C←D3←D2←D1←D0←0), X ← X+1

 

[%Y]

[Y] (C←D3←D2←D1←D0←0)

 

 

 

[%Y]+

[Y] (C←D3←D2←D1←D0←0), Y ← Y+1

SRL

%A

A (0→D3→D2→D1→D0→C)

 

 

 

 

 

%B

B (0→D3→D2→D1→D0→C)

 

 

 

 

 

[%X]

[X] (0→D3→D2→D1→D0→C)

 

 

 

[%X]+

[X] (0→D3→D2→D1→D0→C), X ← X+1

 

[%Y]

[Y] (0→D3→D2→D1→D0→C)

 

 

 

[%Y]+

[Y] (0→D3→D2→D1→D0→C), Y ← Y+1

RL

%A

A (C←D3←D2←D1←D0←C)

 

 

 

 

 

%B

B (C←D3←D2←D1←D0←C)

 

 

 

 

 

[%X]

[X] (C←D3←D2←D1←D0←C)

 

 

 

[%X]+

[X] (C←D3←D2←D1←D0←C), X ← X+1

 

[%Y]

[Y] (C←D3←D2←D1←D0←C)

 

 

 

[%Y]+

[Y] (C←D3←D2←D1←D0←C), Y ← Y+1

RR

%A

A (C→D3→D2→D1→D0→C)

 

 

 

 

 

%B

B (C→D3→D2→D1→D0→C)

 

 

 

 

 

[%X]

[X] (C→D3→D2→D1→D0→C)

 

 

 

[%X]+

[X] (C→D3→D2→D1→D0→C), X ← X+1

 

[%Y]

[Y] (C→D3→D2→D1→D0→C)

 

 

 

[%Y]+

[Y] (C→D3→D2→D1→D0→C), Y ← Y+1

LDB

%BA,%XL

BA ← XL

 

 

 

 

 

 

 

 

 

%BA,%XH

BA ← XH

 

 

 

 

 

 

 

 

 

%BA,%YL

BA ← YL

 

 

 

 

 

 

 

 

 

%BA,%YH

BA ← YH

 

 

 

 

 

 

 

 

 

%BA,%EXT

BA ← EXT

 

 

 

 

 

 

 

 

 

%BA,%SP1

BA ← SP1

 

 

 

 

 

 

 

 

 

%BA,%SP2

BA ← SP2

 

 

 

 

 

 

 

 

Extended function

Clk

 

Flags

 

Symbol

(when "LDB %EXT, imm8" is executed)

E

I

C

Z

 

 

–

2

0

–

–

↔

●

–

2

0

–

–

↔

●

–

2

0

–

–

↔

●

–

2

0

–

–

↔

●

–

1

0

–

–

↔

●

–

1

0

–

–

↔

●

–

1

0

–

↔ ↔

–

–

1

0

–

↔ ↔

–

[00imm8] (C←D3←D2←D1←D0←0)

2

0

–

↔ ↔

–

–

2

0

–

↔ ↔

–

[FFimm8] (C←D3←D2←D1←D0←0)

2

0

–

↔ ↔

–

–

2

0

–

↔ ↔

–

–

1

0

–

↔ ↔

–

–

1

0

–

↔ ↔

–

[00imm8] (0→D3→D2→D1→D0→C)

2

0

–

↔ ↔

–

–

2

0

–

↔ ↔

–

[FFimm8] (0→D3→D2→D1→D0→C)

2

0

–

↔ ↔

–

–

2

0

–

↔ ↔

–

–

1

0

–

↔ ↔

–

–

1

0

–

↔ ↔

–

[00imm8] (C←D3←D2←D1←D0←C)

2

0

–

↔ ↔

–

–

2

0

–

↔ ↔

–

[FFimm8] (C←D3←D2←D1←D0←C)

2

0

–

↔ ↔

–

–

2

0

–

↔ ↔

–

–

1

0

–

↔ ↔

–

–

1

0

–

↔ ↔

–

[00imm8] (C→D3→D2→D1→D0→C)

2

0

–

↔ ↔

–

–

2

0

–

↔ ↔

–

[FFimm8] (C→D3→D2→D1→D0→C)

2

0

–

↔ ↔

–

–

2

0

–

↔ ↔

–

–

1

0

–

–

–

–

–

1

0

–

–

–

–

–

1

0

–

–

–

–

–

1

0

–

–

–

–

–

1

0

–

–

–

–

–

1

0

–

–

–

–

–

1

0

–

–

–

–

Remarks