Instruction List (13)

S1C63000 Core CPU

Classification

Mnemonic

Opcode

Operand

 

Branch control JR

sign8

 

JR

%A

 

 

%BA

 

JR

[00addr6]

 

JRC

sign8

 

JRNC

sign8

 

JRZ

sign8

 

JRNZ

sign8

 

JP

%Y

 

CALZ

imm8

 

CALR

sign8

 

CALR

[00addr6]

 

INT

imm6

 

RET

 

 

RETS

 

 

RETD

imm8

 

RETI

 

System

HALT

 

control

SLP

 

 

NOP

 

Basic function

 

Extended function

 

 

Clk

 

Flags

 

Symbol

 

(when "LDB %EXT, imm8" is executed)

 

E

I

C

Z

 

 

 

 

 

PC ← PC+sign8+1 (sign8=-128~127)

PC ← PC+sign16+1 (sign16=-32768~32767)*

1

 

1

0

–

–

–

●,@rl

 

 

PC ← PC+A+1

–

 

 

 

 

1

0

–

–

–

–

PC ← PC+BA+1

–

 

 

 

 

1

0

–

–

–

–

PC ← PC+[00addr6]+1

–

 

 

 

 

2

0

–

–

–

●

If C=1 then PC ← PC+sign8+1 (sign8=-128~127)

If

C=1 then PC ← PC+sign16+1

(sign16=-32768~32767)*

1

1

0

–

–

–

●,@rl

 

If C=0 then PC ← PC+sign8+1 (sign8=-128~127)

If

C=0 then PC ← PC+sign16+1

(sign16=-32768~32767)*

1

1

0

–

–

–

●,@rl

 

If Z=1 then PC ← PC+sign8+1 (sign8=-128~127)

If

Z=1 then PC ← PC+sign16+1

(sign16=-32768~32767)*

1

1

0

–

–

–

●,@rl

 

If Z=0 then PC ← PC+sign8+1 (sign8=-128~127)

If

Z=0 then PC ← PC+sign16+1

(sign16=-32768~32767)*

1

1

0

–

–

–

●,@rl

 

PC ← Y

–

 

 

 

 

1

0

–

–

–

–

([(SP1-1)∗4+3]~[(SP1-1)∗4]) ← PC+1, SP1 ← SP1-1,

–

 

 

 

 

1

0

–

–

–

●

PC ← imm8

 

 

 

 

 

 

 

 

 

 

 

([(SP1-1)∗4+3]~[(SP1-1)∗4]) ← PC+1, SP1 ← SP1-1,

([(SP1-1)∗4+3]~[(SP1-1)∗4]) ← PC+1, SP1 ← SP1-1,

 

1

0

–

–

–

●,@rl

PC ← PC+sign8+1 (sign8=-128~127)

PC ← PC+sign16+1 (sign16=-32768~32767)*

 

 

 

 

 

 

 

 

([(SP1-1)∗4+3]~[(SP1-1)∗4]) ← PC+1, SP1 ← SP1-1,

–

 

 

 

 

2

0

–

–

–

●

PC ← PC+[00addr6]+1

–

 

 

 

 

 

 

 

 

 

 

[SP2-1] ← F, SP2 ← SP2-1,

–

 

 

 

 

3

0

–

–

–

–

([(SP1-1)∗4+3]~[(SP1-1)∗4]) ← PC+1, SP1 ← SP1-1,

–

 

 

 

 

 

 

 

 

 

 

PC ← imm6 (imm6=0100H~013FH)

–

 

 

 

 

 

 

 

 

 

 

PC ← ([SP1∗4+3]~[SP1∗4]), SP1 ← SP1+1

–

 

 

 

 

1

0

–

–

–

–

PC ← ([SP1∗4+3]~[SP1∗4]), SP1 ← SP1+1, PC ← PC+1

–

 

 

 

 

2

0

–

–

–

–

PC ← ([SP1∗4+3]~[SP1∗4]), SP1 ← SP1+1

–

 

 

 

 

3

0

–

–

–

●,@h,@l

[X] ← i3~0, [X+1] ← i7~4, X ← X+2

–

 

 

 

 

 

 

 

 

 

 

PC ← ([SP1∗4+3]~[SP1∗4]), SP1 ← SP1+1

–

 

 

 

 

2

↔ ↔ ↔ ↔

–

F ← [SP2], SP2 ← SP2+1

–

 

 

 

 

 

 

 

 

 

 

Halt

–

 

 

 

 

2

0

–

–

–

–

Sleep

–

 

 

 

 

2

0

–

–

–

–

No operation (PC← PC+1)

–

 

 

 

 

1

0

–

–

–

–

Remarks ∗1: sign16(s15–s8) = imm8, sign16(s7–s0) = sign8