SCSI BUS

7.6 Bus Phases

The SCSI bus must be in one of the following eight phases:

BUS FREE phase

ARBITRATION phase

SELECTION phase

RESELECTION phase

COMMAND phase

DATA phase

INFORMATION TRANSFER phase

STATUS phase

MESSAGE phase

The SCSI bus can never be in more than one phase at any given time.

Note:

In the following bus phase definition, signals are false unless

 

otherwise defined. Signals on the timing charts are assumed to be

 

positive logic.

7.6.1 BUS FREE phase

No SCSI device uses the bus during a BUS FREE phase. SCSI devices shall detect the BUS FREE phase after SEL and BSY signals are both false for at least Bus Settle Delay.

SCSI devices which have detected the BUS FREE phase shall release all bus signals within Bus Clear Delay after BSY and SEL become false for a Bus Settle Delay. If an SCSI device requires more than Bus Settle Delay to detect the BUS FREE phase, it shall release all bus signals within the following period (t):

t = (Bus Clear Delay) – (Period required for BUS FREE phase detection) + (Bus Settle Delay)

The maximum time allowed for releasing the bus after both SEL and BSY becomes false is 1.2 s.

Figure 7.9 shows the BUS FREE phase.

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Fujitsu MCP3064SS, MCM3064SS, MCP3130SS, MCM3130SS manual Bus Phases, BUS Free phase