Intel 41110 manual Contents

			Contents
Contents
1	About This Document		7
	1.1	Terminology and Definitions	7
2	Introduction		9
	2.1	PCI Express Interface Features	9
	2.2	PCI-X Interface Features	9
	2.3	Power Management	10
	2.4	SMBus Interface	10
	2.5	JTAG	12
	2.6	Related Documents	12
	2.7	Intel® 41110 Serial to Parallel PCI Bridge Applications	13
3	Package Information		15
	3.1	Package Specification	15
4	Power Plane Layout		17
	4.1	41110 Decoupling Guidelines	17
	4.2	Split Voltage Planes	19
5	41110 Reset and Power Timing Considerations		21
	5.1	A_RST# and PERST# Timing Requirements	21
	5.2	VCC15 and VCC33 Voltage Requirements	21
6	General Routing Guidelines		23
	6.1	General Routing Guidelines	23
	6.2	Crosstalk	23
	6.3	EMI Considerations	24
	6.4	Power Distribution and Decoupling	25
	6.5	Trace Impedance	25
7	Board Layout Guidelines		27
	7.1	Adapter Card Topology	27
8	PCI-X Layout Guidelines		29
	8.1	Interrupts	29
	8.2	PCI Arbitration	30
	8.3	PCI General Layout Guidelines	31
	8.4	PCI Clock Layout Guidelines	32
	8.5	PCI-X Topology Layout Guidelines	35
	8.6	41110 Layout Analysis	35
9	PCI Express Layout		41
	9.1	General recommendations	41
	9.2	PCI-Express Layout Guidelines	42
	9.3	Adapter Card Layout Guidelines	42
10	Circuit Implementations		45
	10.1	41110 Analog Voltage Filters	45

Intel® 41110 Serial to Parallel PCI Bridge Design Guide iii