Motorola MVME2400 manual PPC60x Originated Latency Matrix, PPC Bus Latency

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Functional Description

PPC Bus Latency

The following tables list the latency of PPC originated transactions and the bandwidth of originated transactions for five different clock ratios: 5:2, 3:2, 3:1, 2:1, and 1:1. The MVME2400 uses a 3:1 clock ratio:

Table 3-5. PPC60x Originated Latency Matrix

			32-bit PCI						64-bit PCI				Clock
Transaction
	Beat	Beat		Beat	Beat	Total	Beat	Beat		Beat	Beat	Total	Ratio
	1	2		3	4		1	2		3	4
Burst Read	40	1		1	1	43	29	1		1	1	32	5:2
Burst Write	5	1		1	1	8	5	1		1	1	8
Single Read	22	-		-	-	22	-	-		-	-	-
Single Write	5	-		-	-	5	-	-		-	-	-
Burst Read	26	1		1	1	29	20	1		1	1	23	3:2
Burst Write	5	1		1	1	8	5	1		1	1	8
Single Read	16	-		-	-	16	-	-		-	-	-
Single Write	5	-		-	-	5	-	-		-	-	-
Burst Read	45	1		1	1	48	33	1		1	1	36	3:1
Burst Write	5	1		1	1	8	5	1		1	1	8
Single Read	24	-		-	-	24	-	-		-	-	-
Single Write	5	-		-	-	5	-	-		-	-	-
Burst Read	33	1		1	1	36	25	1		1	1	28	2:1
Burst Write	5	1		1	1	8	5	1		1	1	8
Single Read	19	-		-	-	19	-	-		-	-	-
Single Write	5	-		-	-	5	-	-		-	-	-
Burst Read	20	1		1	1	23	16	1		1	1	19	1:1
Burst Write	5	1		1	1	8	5	1		1	1	8
Single Read	13	-		-	-	13	-	-		-	-	-
Single Write	5	-		-	-	5	-	-		-	-	-

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