3

Functional Description

Table 3-9. 60x Bus to SDRAM Access Timing (100MHz/PC100 SDRAMs)

ACCESS TYPE

Access Time

Comments

(tB1-tB2-tB3-tB4)

 

 

 

 

 

4-Beat Write after 4-Beat Write,

3-1-1-1

3-1-1-1 for the second burst

SDRAM Bank Active - Page Hit

 

write after idle.

 

 

2-1-1-1 for subsequent burst

 

 

writes.

 

 

 

1-Beat Read after idle,

10

 

SDRAM Bank Inactive

 

 

 

 

 

 

1-Beat Read after idle,

12

 

SDRAM Bank Active - Page Miss

 

 

 

 

 

 

1-Beat Read after idle,

7

 

SDRAM Bank Active - Page Hit

 

 

 

 

 

 

1-Beat Read after 1-Beat Read,

8

 

SDRAM Bank Active - Page Miss

 

 

 

 

 

 

1-Beat Read after 1-Beat Read,

5

 

SDRAM Bank Active - Page Hit

 

 

 

 

 

 

1-Beat Write after idle,

5

 

SDRAM Bank Active or Inactive

 

 

 

 

 

 

1-Beat Write after 1-Beat Write,

13

 

SDRAM Bank Active - Page Miss

 

 

 

 

 

 

1-Beat Write after 1-Beat Write,

8

 

SDRAM Bank Active - Page Hit

 

 

 

 

 

 

3-16

Computer Group Literature Center Web Site

Page 64
Image 64
Motorola MVME2400 manual X Bus to Sdram Access Timing 100MHz/PC100 SDRAMs