Block Diagram

VMEbus Interface

The VMEbus interface is implemented with the CA91C142 Universe ASIC. The Universe chip interfaces the 32/64-bit PCI local bus to the VMEbus.

The Universe ASIC provides:

The PCI-bus-to-VMEbus interface

The VMEbus-to-PCI-bus interface

The DMA controller functions of the local VMEbus

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The Universe chip includes Universe Control and Status Registers (UCSRs) for interprocessor communications. It can provide the VMEbus system controller functions as well. For detailed programming information, refer to the Universe User’s Manual and to the discussions in the MVME2400-Series VME Processor Module Programmer's Reference Guide.

Maximum performance is achieved with D64 Multiplexed Block Transfers (MBLT). The on-chip DMA channel should be used to move large blocks of data to/from the VMEbus. The Universe should be able to reach 50MB/second in 64-bit MBLT mode.

The MVME2400 interfaces to the VMEbus via the P1 and P2 connectors, which use the new 5-row 160-pin connectors as specified in the VME64 extension standard. It also draws +5V, +12V, and -12V power from the VMEbus backplane through these two connectors. 3.3V and 2.5V supplies are regulated onboard from the +5 power.

Asynchronous Debug Port

A Texas Instrument’s Universal Asynchronous Receiver/Transmitter (UART) provides the asynchronous debug port. TTL-level signals for the port are routed through appropriate EIA-232-D drivers and receivers to an RJ45 connector on the front panel. The external signals are ESD protected.

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Motorola MVME2400 manual VMEbus Interface, Asynchronous Debug Port