Toshiba G50 manual System Block Diagram Hardware Overview

1.2 System Block Diagram 1 Hardware Overview

‰Chipset

This gate array has the following elements and functions.

•North Bridge (Intel GM45/GL40-Cantiga (G) MCH)

Meorom Processor System Bus Supports

PCI Express Based Graphics Interface

System Memory supports :DDR2-667／DDR2-800, 4GB max.

DMI(Direct Media Interface: x4/x2, ASPM L0s, L1 states support)

Power management control (DPST 4.0)

•South Bridge (Intel ICH9M)

-PCI Local Bus Specification, Revision 2.3-compliant with support for 33MHz PCI operations

-PCI slots (supports up to 4 Req/Gnt pairs) -PCI Express (6 PCI Express root ports) -ACPI 3.0b compliant

-Enhanced DMA Controller, Interrupt Controller, and Timer Functions -Integrated Serial ATA Host Controller (4 ports)

-USB host interface with support for 12 USB ports; 6 UHCI host controllers; 2 EHCI high-speed USB 2.0 Host Controller

-System Management Bus (SMBus) Specification, Version 2.0 with additional support for I2C devices

-Intel High Definition Audio Interface

-Supports Audio Codec ’97, Revision 2.3 specification or HD Audio -Low Pin Count (LPC) interface

-Firmware Hub (FHW) interface support -Alert On LAN (AOL)

-Support for Intel® AMT 4.0

-Support for Integrated Trusted Port modulee 1.2 -Package 676 pin BGA (31 x 31mm)

‰Card controller (R5C833)

-PCI Interface

-IEEE1394 Controller

-SD/MMC, MemoryStick, xD card Controller

QOSMIO G50 Maintenance Manual (960-683) [CONFIDENTIAL] 1-11