Intel 317698-001 manual Design and Layout Checklists

Page 4

82575 Ethernet Controller Design Guide

 

5.3

Frequency Tolerance

32

 

5.4

Temperature Stability and Environmental Requirements

32

 

5.5

Calibration Mode

33

 

5.6

Load Capacitance

33

 

5.7

Shunt Capacitance

34

 

5.8

Equivalent Series Resistance

34

 

5.9

Drive Level

34

 

5.10

Aging

34

 

5.11

Reference Crystal

34

 

 

5.11.1

Reference Crystal Selection

35

 

 

5.11.2

Circuit Board

35

 

 

5.11.3

Temperature Changes

35

6.0

Oscillator Support

37

 

6.1

Oscillator Solution

37

7.0

Ethernet Component Layout Guidelines

39

 

7.1

Layout Considerations for 82575 Ethernet Controllers

39

 

 

7.1.1

Guidelines for Component Placement

39

 

 

7.1.2

Crystals and Oscillators

42

 

 

7.1.3

Board Stack Up Recommendations

43

 

 

7.1.4

Differential Pair Trace Routing for 10/100/1000 Designs

44

 

 

7.1.5 Signal Trace Geometry for 1000 BASE-T Designs

45

 

 

7.1.6

Trace Length and Symmetry for 1000 BASE-T Designs

45

 

 

7.1.7

Routing 1.8 V to the Magnetics Center Tap

46

 

 

7.1.8

Impedance Discontinuities

46

 

 

7.1.9

Reducing Circuit Inductance

46

 

 

7.1.10

Signal Isolation

46

 

 

7.1.11

Power and Ground Planes

47

 

 

7.1.12

Traces for Decoupling Capacitors

47

 

 

7.1.13

Light Emitting Diodes for Designs Based on the 82575 Controller

47

 

 

7.1.14

Thermal Design Considerations

48

 

7.2

Physical Layer Conformance Testing

48

 

 

7.2.1

Conformance Tests for 10/100/1000 Mbps Designs

48

 

7.3

Troubleshooting Common Physical Layout Issues

48

8.0

Thermal Management

50

9.0

Reference Design Bill of Materials

50

10.0

Design and Layout Checklists

50

11.0

Reference Schematics

50

12.0

Symbol

50

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Contents Intel 82575 Gigabit Ethernet Controller Design GuidePage Contents Design and Layout Checklists Revision History Date Revision DescriptionThis page intentionally left blank Introduction ScopeReference Documents Other PCI Express Signals Physical Layer FeaturesLink Width Configuration PCI Express Port Connection to the DevicePolarity Inversion Lane ReversalPCI Express Routing Lane Reversal supported modesThis page left intentionally blank Ethernet Component Design Guidelines General Design Considerations for Ethernet ControllersClock Source Magnetics for 1000 BASE-TDesigning with the 82575/EB/ES Gigabit Ethernet Controller Modules for 1000 BASE-T EthernetThird-Party Magnetics Manufacturers Manufacturer Part NumberPCI/LAN Function Index PCI Function # SelectSymbol Ball # Name and function Function Default Control optionsSerial Eeprom General RegionsSPI EEPROMs for 82575 Ethernet Controller Controller Eeprom Map InformationManufacturer Size Manufacturers Part Number Eeupdate FlashFlash Write Control Flash Erase ControlFlash Device Information SMBus and NC-SIManufacturer Device Power Supplies for the 82575 Ethernet Controller Controllers Example Switching Voltage Regulator for 1.0 V and 1.8 1 82575 Ethernet Controller Power Sequencing Vout=1.0v 2AY Using Regulators With Enable Pins 2 82575 Ethernet Controller Device Power Supply FilteringPower Rail 7uF or 1uF 10uF Power Management PCIe Power Management4.2 82575 Ethernet Controller Power Management L0s D0u D0a82575 Ethernet Controller Device Test Capability Auto Cross-over for MDI and MDI-X resolutionPHY Functionality Low-Power Link Up Using SmartSpeedSmartspeed Flow ControlPolarity Correction Link Energy Detect25.6 Reg Copper PHY Link Configuration Auto-Negotiation differences between PHY, SerDes and SgmiiCopper/Fiber Switch SerDes-Detect Mode PHY is activeDevice Disable Internal PHY-to-SerDes TransitionSoftware-Definable Pins SDPs Bios handling of Device DisableEthernet Controller Design Guide Frequency Control Device Design Considerations Frequency Control Component TypesQuartz Crystal Fixed Crystal OscillatorProgrammable Crystal Oscillators Ceramic ResonatorVibrational Mode Temperature Stability and Environmental RequirementsCrystal Selection Parameters Nominal FrequencyCalibration Mode Load CapacitanceShunt Capacitance Equivalent Series ResistanceDrive Level AgingReference Crystal Selection Temperature ChangesCircuit Board This page is intentionally left blank Specifications Symbol Parameter Units Min Typical Max Oscillator SolutionOscillator Support VGG=0.6V Rpar =100MΩ Cpar =20pF Ethernet Component Layout Guidelines Guidelines for Component PlacementLayout Considerations for 82575 Ethernet Controllers LAN Layout for Integrated Magnetics Crystals and Oscillators Crystal layout considerationsBoard Stack Up Recommendations CrystalDifferential Pair Trace Routing for 10/100/1000 Designs Trace RoutingSignal Termination and Coupling Signal Trace Geometry for 1000 BASE-T DesignsTrace Length and Symmetry for 1000 BASE-T Designs Signal Isolation Signal DetectRouting 1.8 V to the Magnetics Center Tap Impedance DiscontinuitiesPower and Ground Planes Traces for Decoupling CapacitorsPhysical Layer Conformance Testing Troubleshooting Common Physical Layout IssuesThermal Design Considerations Conformance Tests for 10/100/1000 Mbps DesignsEthernet Controller Design Guide Design and Layout Checklists Reference SchematicsSymbol Thermal Management

317698-001 specifications

The Intel 317698-001 is a prominent and highly regarded component in the realm of computer hardware. This product is part of Intel's extensive portfolio, designed primarily for enhancing computing performance, efficiency, and reliability. It is typically associated with server motherboards and is known for its robust architecture, making it ideal for enterprise-level applications.

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