Intel 317698-001 manual 2 82575 Ethernet Controller Device Power Supply Filtering

Page 25

82575 Ethernet Controller Design Guide

•1.8 V must not exceed 3.3 V.

•1.0 V must not exceed 3.3 V.

•1.0 V must not exceed 1.8 V.

The power supplies are all expected to ramp during a short power-up internal (approximately 20ms or better). Do not leave the device in a prolonged state were some, but not all, voltages are applied.

3.4.1.1Using Regulators With Enable Pins

The use of regulators with enable pins is very helpful in controlling sequencing. Connecting the enable of the 1.8 V regulator to 3.3 Vwill allow the 1.8 V to ramp as shown in Figure 3. Connecting the enable of the 1.0 V regulator to the 1.8 V output assures that the 1.0 V rail will ramp after the 1.8 V rail. This provides a quick solution to power sequencing. Make sure to check design parameters for inputs with this configuration.

3.4.282575 Ethernet Controller Device Power Supply Filtering

Provide several high-frequency bypass capacitors for each power rail (see table below), selecting values in the range of 0.01µF to 0.1µF. If possible, orient the capacitors close to the device and adjacent to power pads. Decoupling capacitors should connect to the power planes with short, thick (18 mils or more) traces and 14 mil vias. Long and thin traces are more inductive and would reduce the intended effect of decoupling capacitors.

Power Rail

4.7uF or

0.1uF

10uF

 

 

 

 

 

3.3 V

1

2

 

 

 

1.8 V

1

4

 

 

 

1.0 V

1

6

 

 

 

Table 6. Minimum Number of Bypass Capacitors per Power Rail.

Furnish approximately 4.7µF to 10µF of bulk capacitance for all the power rails; placement should be as close to the device power connection as possible.

3.4.382575 Ethernet Controller Controller Power Management and Wake Up

The 82575 Ethernet Controller Gigabit Ethernet Controller supports low power operation as defined in the PCI Bus Power Management Specification. There are two defined power states, D0 and D3. The D0 state provides full power operation and is divided into two sub-states: D0u (uninitialized) and D0a (active). The D3 state provides low power operation and is also divided into two sub-states: D3hot and D3cold.

To enter the low power state (D3), the software driver must stop data transmission and reception. Either the operating system or the driver must program the Power Management Control/Status Register (PMCSR) and the Wakeup Control Register (WUC). If wakeup is desired, the appropriate wakeup LAN address filters must also be set. The initial power management settings are specified by EEPROM bits.

When the 82575 Ethernet Controller transitions to either of the D3 low power states, the 1.0 V, 1.8 V, and 3.3 V sources must continue to be supplied to the device. Otherwise, it will not be possible to use a wakeup mechanism. The AUX_PWR signal is a

19

Page 24 Page 26
Image 25
Page 24 Page 26
Contents Design Guide Intel 82575 Gigabit Ethernet ControllerPage Contents Design and Layout Checklists Date Revision Description Revision HistoryThis page intentionally left blank Scope IntroductionReference Documents Physical Layer Features Other PCI Express SignalsLink Width Configuration PCI Express Port Connection to the DeviceLane Reversal Polarity InversionLane Reversal supported modes PCI Express RoutingThis page left intentionally blank General Design Considerations for Ethernet Controllers Ethernet Component Design GuidelinesClock Source Magnetics for 1000 BASE-TModules for 1000 BASE-T Ethernet Designing with the 82575/EB/ES Gigabit Ethernet ControllerThird-Party Magnetics Manufacturers Manufacturer Part NumberPCI Function # Select PCI/LAN Function IndexFunction Default Control options Symbol Ball # Name and functionSerial Eeprom General RegionsSPI EEPROMs for 82575 Ethernet Controller Controller Eeprom Map InformationManufacturer Size Manufacturers Part Number Flash EeupdateFlash Erase Control Flash Write ControlFlash Device Information SMBus and NC-SIManufacturer Device Power Supplies for the 82575 Ethernet Controller Controllers Example Switching Voltage Regulator for 1.0 V and 1.8 Vout=1.0v 2A 1 82575 Ethernet Controller Power SequencingY Using Regulators With Enable Pins 2 82575 Ethernet Controller Device Power Supply FilteringPower Rail 7uF or 1uF 10uF PCIe Power Management Power ManagementL0s D0u D0a 4.2 82575 Ethernet Controller Power Management82575 Ethernet Controller Device Test Capability Auto Cross-over for MDI and MDI-X resolutionPHY Functionality Using SmartSpeed Low-Power Link UpSmartspeed Flow ControlPolarity Correction Link Energy Detect25.6 Reg Auto-Negotiation differences between PHY, SerDes and Sgmii Copper PHY Link ConfigurationSerDes-Detect Mode PHY is active Copper/Fiber SwitchInternal PHY-to-SerDes Transition Device DisableBios handling of Device Disable Software-Definable Pins SDPsEthernet Controller Design Guide Frequency Control Component Types Frequency Control Device Design ConsiderationsQuartz Crystal Fixed Crystal OscillatorCeramic Resonator Programmable Crystal OscillatorsTemperature Stability and Environmental Requirements Vibrational ModeCrystal Selection Parameters Nominal FrequencyLoad Capacitance Calibration ModeEquivalent Series Resistance Shunt CapacitanceDrive Level AgingReference Crystal Selection Temperature ChangesCircuit Board This page is intentionally left blank Specifications Symbol Parameter Units Min Typical Max Oscillator SolutionOscillator Support VGG=0.6V Rpar =100MΩ Cpar =20pF Ethernet Component Layout Guidelines Guidelines for Component PlacementLayout Considerations for 82575 Ethernet Controllers LAN Layout for Integrated Magnetics Crystal layout considerations Crystals and OscillatorsCrystal Board Stack Up RecommendationsTrace Routing Differential Pair Trace Routing for 10/100/1000 DesignsSignal Termination and Coupling Signal Trace Geometry for 1000 BASE-T DesignsTrace Length and Symmetry for 1000 BASE-T Designs Signal Detect Signal IsolationRouting 1.8 V to the Magnetics Center Tap Impedance DiscontinuitiesTraces for Decoupling Capacitors Power and Ground PlanesTroubleshooting Common Physical Layout Issues Physical Layer Conformance TestingThermal Design Considerations Conformance Tests for 10/100/1000 Mbps DesignsEthernet Controller Design Guide Reference Schematics Design and Layout ChecklistsSymbol Thermal Management

317698-001 specifications

The Intel 317698-001 is a prominent and highly regarded component in the realm of computer hardware. This product is part of Intel's extensive portfolio, designed primarily for enhancing computing performance, efficiency, and reliability. It is typically associated with server motherboards and is known for its robust architecture, making it ideal for enterprise-level applications.

One of the standout features of the Intel 317698-001 is its compatibility with multiple Intel processors, which provides flexibility for users looking to upgrade or configure their systems. This compatibility ensures that enterprises can choose from a range of processors according to their specific workload requirements, allowing for tailored performance enhancements.

The product is built on the foundation of advanced technologies, such as Intel's Turbo Boost and Hyper-Threading. Turbo Boost allows the processor to operate at higher frequencies than its base clock speed when demand increases, providing a significant performance boost when needed. Hyper-Threading enables multiple threads to run simultaneously on each core, which can lead to improved multitasking capabilities and more efficient resource utilization.

Memory bandwidth is another vital characteristic of the Intel 317698-001. This component supports high-speed DDR4 memory, offering increased bandwidth that is crucial for data-intensive applications. The architecture is designed to work seamlessly with ECC (Error-Correcting Code) memory, enhancing system reliability by detecting and correcting internal data corruption.

In terms of connectivity, the Intel 317698-001 features multiple PCIe lanes, supporting various expansion cards for enhanced functionality. This includes the integration of NVMe drives for faster storage solutions, which is essential for modern applications that demand quick data access and retrieval.

Security is also a priority with the Intel 317698-001, which incorporates hardware-based security features to protect data integrity and prevent unauthorized access. These features include Intel Trusted Execution Technology, which creates a secure environment for executing sensitive code.

Overall, the Intel 317698-001 stands out with its combination of performance, versatility, and security. It is an ideal choice for businesses looking to enhance their computing capabilities while ensuring system reliability and security in an increasingly data-driven world. With its robust technological foundation, it continues to play a critical role in modern computing environments.
Top Page Image Contents