Intel 317698-001 manual SMBus and NC-SI, Flash Device Information, Manufacturer Device

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82575 Ethernet Controller Design Guide

Note: Sector erase by SW is not supported. In order to delete a sector, the serial (bit bang) interface should be used.

3.2.4.3FLASH Device Information

While Intel does not make specific recommendations regarding FLASH devices, the following devices have been used successfully in previous designs:

Manufacturer

Device

Notes

 

 

 

 

 

Please contact

Intel

Blanshard

your Intel

representative

 

 

 

 

for information

 

 

 

Atmel

AT25F1024

 

 

 

 

Atmel

AT25F2048

 

 

 

 

3.3SMBus and NC-SI

SMB and NC-SI are optional interfaces for pass-through and/or configuration traffic between the BMC and the 82575 Ethernet Controller. Please refer to the 82575 TCO/ System Management Interface Guide for more information.

Note: Intel recommends that the SMBus be connected to the ICH or BMC for the EEPROM recovery solution. If the connection is to a BMC, it will be able to send the EEPROM release command.

The 82575 Ethernet Controller NC-SI interface is a connection to an external BMC. It operates in one of two modes:

NC-SI-SMB mode - In conjunction with an SMB interface, where pass-through traffic passes through NC-SI and configuration traffic passes through SMB

NC-SI mode - As a single interface with an external BMC, where all traffic (other than header redirection) between the 82575 Ethernet Controller and the BMC flows through the interface.

The Clock-out (if enabled) is provided in all power states (unless the device is disabled).

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Contents Intel 82575 Gigabit Ethernet Controller Design GuidePage Contents Design and Layout Checklists Revision History Date Revision DescriptionThis page intentionally left blank Introduction ScopeReference Documents Other PCI Express Signals Physical Layer FeaturesLink Width Configuration PCI Express Port Connection to the DevicePolarity Inversion Lane ReversalPCI Express Routing Lane Reversal supported modesThis page left intentionally blank Ethernet Component Design Guidelines General Design Considerations for Ethernet ControllersClock Source Magnetics for 1000 BASE-TDesigning with the 82575/EB/ES Gigabit Ethernet Controller Modules for 1000 BASE-T EthernetThird-Party Magnetics Manufacturers Manufacturer Part NumberPCI/LAN Function Index PCI Function # SelectSymbol Ball # Name and function Function Default Control optionsSerial Eeprom General RegionsManufacturer Size Manufacturers Part Number Eeprom Map InformationSPI EEPROMs for 82575 Ethernet Controller Controller Eeupdate FlashFlash Write Control Flash Erase ControlManufacturer Device SMBus and NC-SIFlash Device Information Power Supplies for the 82575 Ethernet Controller Controllers Example Switching Voltage Regulator for 1.0 V and 1.8 1 82575 Ethernet Controller Power Sequencing Vout=1.0v 2AY Power Rail 7uF or 1uF 10uF 2 82575 Ethernet Controller Device Power Supply FilteringUsing Regulators With Enable Pins Power Management PCIe Power Management4.2 82575 Ethernet Controller Power Management L0s D0u D0aPHY Functionality Auto Cross-over for MDI and MDI-X resolution82575 Ethernet Controller Device Test Capability Low-Power Link Up Using SmartSpeedSmartspeed Flow Control25.6 Reg Link Energy DetectPolarity Correction Copper PHY Link Configuration Auto-Negotiation differences between PHY, SerDes and SgmiiCopper/Fiber Switch SerDes-Detect Mode PHY is activeDevice Disable Internal PHY-to-SerDes TransitionSoftware-Definable Pins SDPs Bios handling of Device DisableEthernet Controller Design Guide Frequency Control Device Design Considerations Frequency Control Component TypesQuartz Crystal Fixed Crystal OscillatorProgrammable Crystal Oscillators Ceramic ResonatorVibrational Mode Temperature Stability and Environmental RequirementsCrystal Selection Parameters Nominal FrequencyCalibration Mode Load CapacitanceShunt Capacitance Equivalent Series ResistanceDrive Level AgingCircuit Board Temperature ChangesReference Crystal Selection This page is intentionally left blank Oscillator Support Oscillator SolutionSpecifications Symbol Parameter Units Min Typical Max VGG=0.6V Rpar =100MΩ Cpar =20pF Layout Considerations for 82575 Ethernet Controllers Guidelines for Component PlacementEthernet Component Layout Guidelines LAN Layout for Integrated Magnetics Crystals and Oscillators Crystal layout considerationsBoard Stack Up Recommendations CrystalDifferential Pair Trace Routing for 10/100/1000 Designs Trace RoutingTrace Length and Symmetry for 1000 BASE-T Designs Signal Trace Geometry for 1000 BASE-T DesignsSignal Termination and Coupling Signal Isolation Signal DetectRouting 1.8 V to the Magnetics Center Tap Impedance DiscontinuitiesPower and Ground Planes Traces for Decoupling CapacitorsPhysical Layer Conformance Testing Troubleshooting Common Physical Layout IssuesThermal Design Considerations Conformance Tests for 10/100/1000 Mbps DesignsEthernet Controller Design Guide Design and Layout Checklists Reference SchematicsSymbol Thermal Management

317698-001 specifications

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