Intel 317698-001 manual Frequency Control Device Design Considerations, Quartz Crystal

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82575 Ethernet Controller Design Guide

4.0Frequency Control Device Design Considerations

This section provides information regarding frequency control devices, including crystals and oscillators, for use with all Intel Ethernet controllers. Several suitable frequency control devices are available; none of which present any unusual challenges in selection. The concepts documented herein are applicable to other data communication circuits, including Platform LAN Connect devices (PHYs).

The Intel Ethernet controllers contain amplifiers, which when used with the specific external components, form the basis for feedback oscillators. These oscillator circuits, which are both economical and reliable, are described in more detail in “Crystal Selection Parameters”.

The Intel Ethernet controllers also have bus clock input functionality, however a discussion of this feature is beyond the scope of this document, and will not be addressed.

The chosen frequency control device vendor should be consulted early in the design cycle. Crystal and oscillator manufacturers familiar with networking equipment clock requirements may provide assistance in selecting an optimum, low-cost solution.

4.1Frequency Control Component Types

Several types of third-party frequency reference components are currently marketed. A discussion of each follows, listed in preferred order.

4.1.1Quartz Crystal

Quartz crystals are generally considered to be the mainstay of frequency control components due to their low cost and ease of implementation. They are available from numerous vendors in many package types and with various specification options.

4.1.2Fixed Crystal Oscillator

A packaged fixed crystal oscillator comprises an inverter, a quartz crystal, and passive components conveniently packaged together. The device renders a strong, consistent square wave output. Oscillators used with microprocessors are supplied in many configurations and tolerances.

Crystal oscillators should be restricted to use in special situations, such as shared clocking among devices or multiple controllers. As clock routing can be difficult to accomplish, it is preferable to provide a separate crystal for each device.

For Intel Ethernet controllers, it is acceptable to overdrive the internal inverter by connecting a

25 MHz external oscillator to the XTAL1 lead, leaving the XTAL2 lead unconnected. The oscillator should be specified to drive CMOS logic levels, and the clock trace to the device should be as short as possible. Device specifications typically call for a 40% (minimum) to 60% (maximum) duty cycle and a ±50 ppm frequency tolerance.

Note: Please contact your Intel Customer Representative to obtain the most current device documentation prior to implementing this solution.

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Contents Intel 82575 Gigabit Ethernet Controller Design GuidePage Contents Design and Layout Checklists Revision History Date Revision DescriptionThis page intentionally left blank Introduction ScopeReference Documents Other PCI Express Signals Physical Layer FeaturesLink Width Configuration PCI Express Port Connection to the DevicePolarity Inversion Lane ReversalPCI Express Routing Lane Reversal supported modesThis page left intentionally blank Ethernet Component Design Guidelines General Design Considerations for Ethernet ControllersClock Source Magnetics for 1000 BASE-TDesigning with the 82575/EB/ES Gigabit Ethernet Controller Modules for 1000 BASE-T EthernetThird-Party Magnetics Manufacturers Manufacturer Part NumberPCI/LAN Function Index PCI Function # SelectSymbol Ball # Name and function Function Default Control optionsSerial Eeprom General RegionsEeprom Map Information SPI EEPROMs for 82575 Ethernet Controller ControllerManufacturer Size Manufacturers Part Number Eeupdate FlashFlash Write Control Flash Erase ControlSMBus and NC-SI Flash Device InformationManufacturer Device Power Supplies for the 82575 Ethernet Controller Controllers Example Switching Voltage Regulator for 1.0 V and 1.8 1 82575 Ethernet Controller Power Sequencing Vout=1.0v 2AY 2 82575 Ethernet Controller Device Power Supply Filtering Using Regulators With Enable PinsPower Rail 7uF or 1uF 10uF Power Management PCIe Power Management4.2 82575 Ethernet Controller Power Management L0s D0u D0aAuto Cross-over for MDI and MDI-X resolution 82575 Ethernet Controller Device Test CapabilityPHY Functionality Low-Power Link Up Using SmartSpeedSmartspeed Flow ControlLink Energy Detect Polarity Correction25.6 Reg Copper PHY Link Configuration Auto-Negotiation differences between PHY, SerDes and SgmiiCopper/Fiber Switch SerDes-Detect Mode PHY is activeDevice Disable Internal PHY-to-SerDes TransitionSoftware-Definable Pins SDPs Bios handling of Device DisableEthernet Controller Design Guide Frequency Control Device Design Considerations Frequency Control Component TypesQuartz Crystal Fixed Crystal OscillatorProgrammable Crystal Oscillators Ceramic ResonatorVibrational Mode Temperature Stability and Environmental RequirementsCrystal Selection Parameters Nominal FrequencyCalibration Mode Load CapacitanceShunt Capacitance Equivalent Series ResistanceDrive Level AgingTemperature Changes Reference Crystal SelectionCircuit Board This page is intentionally left blank Oscillator Solution Specifications Symbol Parameter Units Min Typical MaxOscillator Support VGG=0.6V Rpar =100MΩ Cpar =20pF Guidelines for Component Placement Ethernet Component Layout GuidelinesLayout Considerations for 82575 Ethernet Controllers LAN Layout for Integrated Magnetics Crystals and Oscillators Crystal layout considerationsBoard Stack Up Recommendations CrystalDifferential Pair Trace Routing for 10/100/1000 Designs Trace RoutingSignal Trace Geometry for 1000 BASE-T Designs Signal Termination and CouplingTrace Length and Symmetry for 1000 BASE-T Designs Signal Isolation Signal DetectRouting 1.8 V to the Magnetics Center Tap Impedance DiscontinuitiesPower and Ground Planes Traces for Decoupling CapacitorsPhysical Layer Conformance Testing Troubleshooting Common Physical Layout IssuesThermal Design Considerations Conformance Tests for 10/100/1000 Mbps DesignsEthernet Controller Design Guide Design and Layout Checklists Reference SchematicsSymbol Thermal Management

317698-001 specifications

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