Spectrum Brands C6x VME64 manual Address, Nodes B, C, and D

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Monaco Technical Reference

Spectrum Signal Processing

Processor Nodes

External Memory Space CE1 is dedicated to accessing registers, global shared RAM and DSP~LINK3 (Node A only). Node A differs from nodes B, C and D since it is the only node with access to the DSP~LINK3. The following figure shows the memory map for this region.

Address

Node A

Nodes B, C, and D

0140 0000

015F FFFC

0160 0000

0163 FFFC

0164 0000

0167 FFFC

0168 0000

016B FFFC

016C 0000

016C 1FFC

016D 0000

016D 7FFC

016D 8000

016D FFFC

016E 0000

016E 7FFC

016E 8000

016E FFFC

016F 0000

016F FFFC

0170 0000

017F FFFC

Global Shared SRAM

512K x 32

DSP~LINK3 Standard Access

DSP~LINK3 Standard Fast Access

DSP~LINK3 RDY Controlled Access

Hurricane Registers

Node A VPAGE Register

Shared Bus Registers

SCV64 Register Set (R/W)

Reserved

IACK Cycle Space (Read Only)

One Mbyte window to the

VME Address Space

VME base address set by VPAGE register

DSP as VME Master (R/W)

Global Shared SRAM

512K x 32

Reserved

Hurricane Registers

Node B, C, or D VPAGE Register

Shared Bus Registers

SCV64 Register Set (R/W)

Reserved

IACK Cycle Space (Read Only)

One Mbyte window to the

VME Address Space

VME base address set by VPAGE register

DSP as VME Master (R/W)

Figure 5 DSP Memory Map for External-Memory Space CE1

14	Part Number 500-00191
	Revision 2.00

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Contents Monaco Revision Preface IiiHistory Document Rev Date ChangesChange Table of Contents Monaco Technical Reference Vii Viii List of Figures Table of Contents List of Tables Xii Product Operation Processors FeaturesIntroduction PMC InterfacesVME PEMReference Documents On-Board Power Supply General Bus ArchitectureJtag Reset Reset ConditionsVME A24 Slave Interface Reset SysresetBoard Layout Board LayoutOUT Jumper settingsJumper Settings Description Part Number Processor Configurations Populated Processor NodesProcessor Node Block Diagram External Memory Processor Memory ConfigurationInternal Memory 0x0180 DSP Memory Map Address Nodes B, C, and DProcessor Expansion Module Synchronous Burst SramSynchronous Dram Host PortProcessor Booting Processor Boot Source Jumpers NodeSerial Port Routing Serial Port RoutingPEM Connections for Serial Port 0 VME and PMC Connections for Serial PortMemory Global Shared Bus Access Source TargetGlobal Shared Bus ArbitrationSingle Cycle Bus Access Burst Cycle Bus AccessLocked Cycles Global Shared Bus SCV64 Primary Slave A32/A24 Interface VME64 Bus InterfaceVME Operation Access A24 Secondary Slave InterfaceA24 Secondary Interface Memory Map HPI Register Addresses VME address HpiaMaster A32/A24/A16 SCV64 Interface VME64 Bus Interface DSP~LINK3 Interface DSP~LINK3 Data Transfer Operating ModesAddress Strobe Control Mode AstrbenInterface Signals DSP~LINK3 ResetDSP~LINK3 Interface PCI Offset Address Hurricane ConfigurationPCI Interface Hurricane Register Set Value InitializeBCC2A Hurricane Implementation PCI DeviceJtag Debugging Jtag ChainJtag Debugging Interrupt Handling OverviewDSP~LINK3 Interrupts to Node a Interrupt RoutingHurricane Interrupt PEM InterruptsPCI Bus Interrupts SCV64 InterruptKipl Status Bits and the Iack Cycle KIPL2 KIPL1 KIPL0Bus Error Interrupts Bit Node Whose Access Caused the Bus ErrorInter-processor Interrupts VME Host Interrupts To Any NodeRegister Address Summary Access Privilege Bus RegistersVpage Register KFC2..0 KSIZE1..0 KADDR1..0Vstatus Register KIPL2..0 BuserraKavec Vinta Register Vintb Register Vintc Register Vintd Register Kiplenc Kipl Enable RegisterKiplend KiplenbDL3RESET DSP~LINK3 RegisterID Register Hintb VME A24 Status RegisterHinta HintcVME A24 Control Register Registers Monaco SpecificationsBoard Identification Monaco67Specifications Parameter GeneralData Access/Transfer Performance Performance and Data ThroughputSpecifications Connector Pinouts Connector LayoutVME Connectors VME P1 Connector PinoutVME P2 Connector Pinout PMC to VME P2 VME P2 Connector DSP~LINK3 to VME P2 PMC Connectors PMC Connector JN1 PinoutPMC Connector JN2 PMC Connector JN4 Non-standard PMC Connector JN5 PEM Connectors PEM 1 Connector PinoutPEM 2 Connector Pinout Jtag OUT Connector Jtag ConnectorsJtag in Connector Pinout Connector Pinouts Appendix a SCV64 Register Values SCV64 Register InitializationSCV64 Register Initialization Index VMEInterrupts to node A, 40 register Reset Jtag Sysreset