Spectrum Brands C6x VME64 manual Appendix a SCV64 Register Values, SCV64 Register Initialization

Page 87

Spectrum Signal Processing

Monaco Technical Reference

 

SCV64 Register Values

Appendix A: SCV64 Register Values

This appendix briefly describes the default register settings for the SCV64 on the Monaco board. The following table shows the default values that are programmed into the registers by the initialization code supplied with the Monaco board.

Table 27 SCV64 Register Initialization

 

‘C6x Address

Register

Value

 

 

 

 

 

 

016E

0000h

DMA Local Address

00000000h

 

 

 

 

 

 

016E

0004h

DMA VMEbus Address

00000000h

 

 

 

 

 

 

016E

0008h

DMA Transfer Count

00000000h

 

 

 

 

 

 

016E

000Ch

Control and Status

00000000h

 

 

 

 

 

 

016E

0010h

VMEbus Slave Base Address

See notes

 

 

 

 

 

 

016E

0014h

Rx FIFO Data

Read only

 

 

 

 

 

 

016E

0018h

Rx FIFO Address Register

Read only

 

 

 

 

 

 

016E

001Ch

Rx FIFO Control Register

Read only

 

 

 

 

 

 

016E

0020h

VMEbus/VSB Bus Select

00000000h

 

 

 

 

 

 

016E

0024h

VMEbus Interrupter Vector

00000000h

 

 

 

 

 

 

016E

0028h

Access Protect Boundary

00000000h

 

 

 

 

 

 

016E

002Ch

Tx FIFO Data Output Latch

Read only

 

 

 

 

 

 

016E

0030h

Tx FIFO Address Output Latch

Read only

 

 

 

 

 

 

016E

0034h

Tx FIFO AM Code and Control Bit Latch

Read only

 

 

 

 

 

 

016E

0038h

Location Monitor FIFO Read Port

Read only

 

 

 

 

 

 

016E

003Ch

SCV64 Mode Control

24000005h

 

 

 

 

 

 

016E

0040h

Slave A64 Base Address

00000000h

 

 

 

 

 

 

016E

0044h

Master A64 Base Address

00000000h

 

 

 

 

 

 

016E

0048h

Local Address Generator

Read only

 

 

 

 

 

 

016E

004Ch

DMA VMEbus Transfer Count

Read only

 

 

 

 

 

 

016E

0050h

 

 

 

 

to

Reserved

 

 

016E

007Ch

 

 

 

016E

0080h

Status Register 0

00000000h

 

 

 

 

 

 

016E

0084h

Status Register 1

00000080h

 

 

 

 

 

 

016E

0088h

General Control Register

0000001Ch

 

 

 

 

 

 

016E

008Ch

VMEbus Interrupter Requester

00000000h

 

 

 

 

 

 

016E

0090h

VMEbus Requester Register

000000CFh

 

 

 

 

 

 

016E

0094h

VMEbus Arbiter Register

00000034h

 

 

 

 

 

 

016E

0098h

ID Register

Read only

 

 

 

 

 

 

016E

009Ch

Control and Status Register

00000002h

 

 

 

 

 

 

016E

00A0h

Level 7 Interrupt Status Register

Read only

 

 

 

 

 

Part Number 500-00191

75

Revision 2.00

 

Image 87
Contents Monaco Revision Iii PrefaceDocument Rev Date Changes ChangeHistory Table of Contents Monaco Technical Reference Vii Viii List of Figures Table of Contents List of Tables Xii Features IntroductionProduct Operation Processors PEM InterfacesVME PMCReference Documents General Bus Architecture On-Board Power SupplySysreset Reset ConditionsVME A24 Slave Interface Reset Jtag ResetBoard Layout Board LayoutJumper settings Jumper Settings DescriptionOUT Part Number Processor Nodes Processor Configurations PopulatedProcessor Node Block Diagram Processor Memory Configuration Internal MemoryExternal Memory 0x0180 DSP Memory Map Nodes B, C, and D AddressHost Port Synchronous Burst SramSynchronous Dram Processor Expansion ModuleProcessor Boot Source Jumpers Node Processor BootingSerial Port Routing Serial Port RoutingVME and PMC Connections for Serial Port PEM Connections for Serial Port 0Arbitration Global Shared Bus Access Source TargetGlobal Shared Bus MemoryBurst Cycle Bus Access Single Cycle Bus AccessLocked Cycles Global Shared Bus VME64 Bus Interface VME OperationSCV64 Primary Slave A32/A24 Interface A24 Secondary Slave Interface AccessA24 Secondary Interface Memory Map Hpia HPI Register Addresses VME addressMaster A32/A24/A16 SCV64 Interface VME64 Bus Interface DSP~LINK3 Data Transfer Operating Modes DSP~LINK3 InterfaceAstrben Address Strobe Control ModeDSP~LINK3 Reset Interface SignalsDSP~LINK3 Interface Hurricane Configuration PCI InterfacePCI Offset Address Value Initialize Hurricane Register SetBCC2A PCI Device Hurricane ImplementationJtag Chain Jtag DebuggingJtag Debugging Overview Interrupt HandlingInterrupt Routing DSP~LINK3 Interrupts to Node aSCV64 Interrupt PEM InterruptsPCI Bus Interrupts Hurricane InterruptKIPL2 KIPL1 KIPL0 Kipl Status Bits and the Iack CycleBit Node Whose Access Caused the Bus Error Bus Error InterruptsVME Host Interrupts To Any Node Inter-processor InterruptsRegisters Register Address Summary Access Privilege BusKFC2..0 KSIZE1..0 KADDR1..0 Vpage RegisterVstatus Register Buserra KavecKIPL2..0 Vinta Register Vintb Register Vintc Register Vintd Register Kiplenb Kipl Enable RegisterKiplend KiplencDSP~LINK3 Register DL3RESETID Register Hintc VME A24 Status RegisterHinta HintbVME A24 Control Register Registers Monaco67 SpecificationsBoard Identification MonacoGeneral Specifications ParameterPerformance and Data Throughput Data Access/Transfer PerformanceSpecifications Connector Layout Connector PinoutsVME P1 Connector Pinout VME ConnectorsVME P2 Connector Pinout PMC to VME P2 VME P2 Connector DSP~LINK3 to VME P2 PMC Connector JN1 Pinout PMC ConnectorsPMC Connector JN2 PMC Connector JN4 Non-standard PMC Connector JN5 PEM 1 Connector Pinout PEM Connectors PEM 2 Connector Pinout Jtag Connectors Jtag in Connector PinoutJtag OUT Connector Connector Pinouts SCV64 Register Initialization Appendix a SCV64 Register ValuesSCV64 Register Initialization VME IndexInterrupts to node A, 40 register Reset Jtag Sysreset