Spectrum Brands C6x VME64 manual Hurricane Register Set, Value Initialize

Page 46

Monaco Technical Reference

Spectrum Signal Processing

PCI Interface

Table 11 Hurricane Register Set

Hurricane DSP Offset

'C6x	PCI Bus	Slave A32/A24	Register Description
Address	Offset	SCV64 Offset

Value Initialize

0x00	0x016C 0000	0x0020 0000	0x0020 0000	DCSR	DMA Control / Status Register	0x0000	0000
0x01	0x016C 0004	0x0020 0004	0x0020 0004	IFSC	Interrupt Flag, Set, Clr	0x0000	0000	Y
0x02	0x016C 0008	0x0020 0008	0x0020 0008	IED	Interrupt Enable to DSP	0x0000	0000	Y
0x03	0x016C 000C	0x0020 000C	0x0020 000C	IEP	Interrupt Enable to PCI	0x0000	0000
0x04	0x016C 0010	0x0020 0010	0x0020 0010	IT	Interrupt type	0x0000	0006	Y
0x05	0x016C 0014	0x0020 0014	0x0020 0014	GCSR	General control and status register	0x1F00 0011
0x06	0x016C 0018	0x0020 0018	0x0020 0018	TTP	Timer trigger point	0x0000	0001
0x07	0x016C 001C	0x0020 001C	0x0020 001C	TV	Timer value	0x0000	0000
0x08	0x016C 0020	0x0020 0020	0x0020 0020	SCR	Serial EEPROM control	0x0000 302C
0x09	0x016C 0024	0x0020 0024	0x0020 0024	SEA	Serial EEPROM address	0x0000	0000
0x0A	0x016C 0028	0x0020 0028	0x0020 0028	SED	Serial EEPROM data	0x0000	0000
0x0B	0x016C 002C	0x0020 002C	0x0020 002C	PFR	Pin Function Register	0x0000	0000
0x0C	0x016C 0030	0x0020 0030	0x0020 0030		reserved	0x0000	0000
0x0D	0x016C 0034	0x0020 0034	0x0020 0034		reserved	0x0000	0000
0x0E	0x016C 0038	0x0020 0038	0x0020 0038	REV	Chip Rev Code	0x0000	0010
0x0F	0x016C 003C	0x0020 003C	0x0020 003C	RAC	Register access control	0x0000	0100
0x10	0x016C 0040	0x0020 0040	0x0020 0040	DDA	DSP Address	0x0000	0000
0x11	0x016C 0044	0x0020 0044	0x0020 0044	DPA	PCI Address	0x0000	0000
0x12	0x016C 0048	0x0020 0048	0x0020 0048	DLNGTH	Length	0x0000	0000
0x13	0x016C 004C	0x0020 004C	0x0020 004C	DINTP	Interrupt Point	0x0000	0000	Y
0x14	0x016C 0050	0x0020 0050	0x0020 0050	DSTRD	DSP Stride	0x0000	0000
0x15	0x016C 0054	0x0020 0054	0x0020 0054	DPC	Packet Control	0x0000 00F6		Y
0x16	0x016C 0058	0x0020 0058	0x0020 0058	DCAR	DMA Chain Address Register	0x0000	0000
0x17	0x016C 005C	0x0020 005C	0x0020 005C		reserved	0x0000	0000
0x18	0x016C 0060	0x0020 0060	0x0020 0060	DCDA	Current DSP Address	0x0000	0000
0x19	0x016C 0064	0x0020 0064	0x0020 0064	DCPA	Current PCI Address	0x0000	0000
0x1A	0x016C 0068	0x0020 0068	0x0020 0068	DCLNTGH	Current Length	0x0000	0000
0x1B	0x016C 006C	0x0020 006C	0x0020 006C	DBC	PCI DMA burst control	0x0020	0020
0x1C	0x016C 0070	0x0020 0070	0x0020 0070	DFC	DMA FIFO Control	0x0000	0620
0x1D	0x016C 0074	0x0020 0074	0x0020 0074	DBE	PCI byte enable and command register	0x0000	0000
0x1E	0x016C 0078	0x0020 0078	0x0020 0078			0x0000	0000
0x1F	0x016C 007C	0x0020 007C	0x0020 007C			0x0000	0000
0x20	0x016C 0080	0x0020 0080	0x0020 0080	BCC0A	DSP Cycle control 0A	0x0010	0021	Y
0x21	0x016C 0084	0x0020 0084	0x0020 0084	BCC0B	DSP Cycle control 0B	0x0000	0140	Y
0x22	0x016C 0088	0x0020 0088	0x0020 0088	BCC0C	DSP Cycle control 0C	0xB401 6820		Y
0x23	0x016C 008C	0x0020 008C	0x0020 008C	BCC0D	DSP Cycle control 0D	0x2800 2800		Y
0x24	0x016C 0090	0x0020 0090	0x0020 0090	BCC1A	DSP Cycle control 1A	0x0000 0000
0x25	0x016C 0094	0x0020 0094	0x0020 0094	BCC1B	DSP Cycle control 1B	0x0000 0000
0x26	0x016C 0098	0x0020 0098	0x0020 0098	BCC1C	DSP Cycle control 1C	0x0000 0000

0x27

0x016C 009C	0x0020 009C	0x0020 009C

BCC1D	DSP Cycle control 1D

0x0000 0000

34	Part Number 500-00191
	Revision 2.00

Image 46

Contents Monaco Revision Preface IiiChange Document Rev Date ChangesHistory Table of Contents Monaco Technical Reference Vii Viii List of Figures Table of Contents List of Tables Xii Introduction FeaturesProduct Operation Processors PMC InterfacesVME PEMReference Documents On-Board Power Supply General Bus ArchitectureJtag Reset Reset ConditionsVME A24 Slave Interface Reset SysresetBoard Layout Board LayoutJumper Settings Description Jumper settingsOUT Part Number Processor Configurations Populated Processor NodesProcessor Node Block Diagram Internal Memory Processor Memory ConfigurationExternal Memory 0x0180 DSP Memory Map Address Nodes B, C, and DProcessor Expansion Module Synchronous Burst SramSynchronous Dram Host PortProcessor Booting Processor Boot Source Jumpers NodeSerial Port Routing Serial Port RoutingPEM Connections for Serial Port 0 VME and PMC Connections for Serial PortMemory Global Shared Bus Access Source TargetGlobal Shared Bus ArbitrationSingle Cycle Bus Access Burst Cycle Bus AccessLocked Cycles Global Shared Bus VME Operation VME64 Bus InterfaceSCV64 Primary Slave A32/A24 Interface Access A24 Secondary Slave InterfaceA24 Secondary Interface Memory Map HPI Register Addresses VME address HpiaMaster A32/A24/A16 SCV64 Interface VME64 Bus Interface DSP~LINK3 Interface DSP~LINK3 Data Transfer Operating ModesAddress Strobe Control Mode AstrbenInterface Signals DSP~LINK3 ResetDSP~LINK3 Interface PCI Interface Hurricane ConfigurationPCI Offset Address Hurricane Register Set Value InitializeBCC2A Hurricane Implementation PCI DeviceJtag Debugging Jtag ChainJtag Debugging Interrupt Handling OverviewDSP~LINK3 Interrupts to Node a Interrupt RoutingHurricane Interrupt PEM InterruptsPCI Bus Interrupts SCV64 InterruptKipl Status Bits and the Iack Cycle KIPL2 KIPL1 KIPL0Bus Error Interrupts Bit Node Whose Access Caused the Bus ErrorInter-processor Interrupts VME Host Interrupts To Any NodeRegister Address Summary Access Privilege Bus RegistersVpage Register KFC2..0 KSIZE1..0 KADDR1..0Vstatus Register Kavec BuserraKIPL2..0 Vinta Register Vintb Register Vintc Register Vintd Register Kiplenc Kipl Enable RegisterKiplend KiplenbDL3RESET DSP~LINK3 RegisterID Register Hintb VME A24 Status RegisterHinta HintcVME A24 Control Register Registers Monaco SpecificationsBoard Identification Monaco67Specifications Parameter GeneralData Access/Transfer Performance Performance and Data ThroughputSpecifications Connector Pinouts Connector LayoutVME Connectors VME P1 Connector PinoutVME P2 Connector Pinout PMC to VME P2 VME P2 Connector DSP~LINK3 to VME P2 PMC Connectors PMC Connector JN1 PinoutPMC Connector JN2 PMC Connector JN4 Non-standard PMC Connector JN5 PEM Connectors PEM 1 Connector PinoutPEM 2 Connector Pinout Jtag in Connector Pinout Jtag ConnectorsJtag OUT Connector Connector Pinouts Appendix a SCV64 Register Values SCV64 Register InitializationSCV64 Register Initialization Index VMEInterrupts to node A, 40 register Reset Jtag Sysreset