Spectrum Brands C6x VME64 manual Jtag

Page 91

Spectrum Signal Processing

JTAG OUT connector, 73 jumper settings, 7

setting DSP boot source, 16

K

KIPL

enable register, 53 status bits, 42

L

locked cycle (global shared bus access), 21

locking

global shared bus, 21

precautions to follow, 21

M

memory configuration, DSP, 11 global shared bus, 19 map

DSP, 13

external-memory space CE1, 14 PCI, 33

primary VME A24/A32, 24 secondary VME A24, 25

Monaco67, 1

P

P1 connector, 64

P2 connector, 65

PCI

IDSEL line of device, 36 interface, 33 interrupts, 41

memory map, 33 PEM, 2, 15

connector, 71

PEM 1, 71

PEM 2, 72

interrupts, 41 performance specifications, 61 pinout. See connector

PMC, 2 connector, 67

JN1, 67

JN2, 68

JN4, 69

JN5, 70

Monaco Technical Reference

SCV64 Register Values

power supply, 4 processor. See DSP

Processor Expansion Module. See PEM

R

reference documents, 3 register, 45

address summary, 45

C6x internal peripheral, 12 DSP~LINK3, 54

Host Port Interface

addresses, 26

Hurricane register set, 34 ID, 55

KIPL enable, 53 SCV64 VME64, 75 VINTA, 49 VINTB, 50 VINTC, 51 VINTD, 52

VME A24 control register, 57 VME A24 status register, 56 VPAGE, 27, 46 VSTATUS, 27, 47

reset, 5 DSP~LINK3, 31

assert or release, 54

JTAG, 5

VME A24 slave interface reset, 5

VME SYSRESET, 5 routing

interrupts, 40 serial ports, 17

S

SBSRAM, 15

SCV64 VME64 interface interrupts, 41 master, 27

memory map

primary, 24

secondary interface, 25

primary slave, 23 register initialization, 75 secondary slave, 24 VPAGE register, 46

SDRAM, 15 serial ports, 2

pin assignments, 18

Part Number 500-00191	79
Revision 2.00

Image 91

Contents Monaco Revision Iii PrefaceChange Document Rev Date ChangesHistory Table of Contents Monaco Technical Reference Vii Viii List of Figures Table of Contents List of Tables Xii Introduction FeaturesProduct Operation Processors PEM InterfacesVME PMCReference Documents General Bus Architecture On-Board Power SupplySysreset Reset ConditionsVME A24 Slave Interface Reset Jtag ResetBoard Layout Board LayoutJumper Settings Description Jumper settingsOUT Part Number Processor Nodes Processor Configurations PopulatedProcessor Node Block Diagram Internal Memory Processor Memory ConfigurationExternal Memory 0x0180 DSP Memory Map Nodes B, C, and D AddressHost Port Synchronous Burst SramSynchronous Dram Processor Expansion ModuleProcessor Boot Source Jumpers Node Processor BootingSerial Port Routing Serial Port RoutingVME and PMC Connections for Serial Port PEM Connections for Serial Port 0Arbitration Global Shared Bus Access Source TargetGlobal Shared Bus MemoryBurst Cycle Bus Access Single Cycle Bus AccessLocked Cycles Global Shared Bus VME Operation VME64 Bus InterfaceSCV64 Primary Slave A32/A24 Interface A24 Secondary Slave Interface AccessA24 Secondary Interface Memory Map Hpia HPI Register Addresses VME addressMaster A32/A24/A16 SCV64 Interface VME64 Bus Interface DSP~LINK3 Data Transfer Operating Modes DSP~LINK3 InterfaceAstrben Address Strobe Control ModeDSP~LINK3 Reset Interface SignalsDSP~LINK3 Interface PCI Interface Hurricane ConfigurationPCI Offset Address Value Initialize Hurricane Register SetBCC2A PCI Device Hurricane ImplementationJtag Chain Jtag DebuggingJtag Debugging Overview Interrupt HandlingInterrupt Routing DSP~LINK3 Interrupts to Node aSCV64 Interrupt PEM InterruptsPCI Bus Interrupts Hurricane InterruptKIPL2 KIPL1 KIPL0 Kipl Status Bits and the Iack CycleBit Node Whose Access Caused the Bus Error Bus Error InterruptsVME Host Interrupts To Any Node Inter-processor InterruptsRegisters Register Address Summary Access Privilege BusKFC2..0 KSIZE1..0 KADDR1..0 Vpage RegisterVstatus Register Kavec BuserraKIPL2..0 Vinta Register Vintb Register Vintc Register Vintd Register Kiplenb Kipl Enable RegisterKiplend KiplencDSP~LINK3 Register DL3RESETID Register Hintc VME A24 Status RegisterHinta HintbVME A24 Control Register Registers Monaco67 SpecificationsBoard Identification MonacoGeneral Specifications ParameterPerformance and Data Throughput Data Access/Transfer PerformanceSpecifications Connector Layout Connector PinoutsVME P1 Connector Pinout VME ConnectorsVME P2 Connector Pinout PMC to VME P2 VME P2 Connector DSP~LINK3 to VME P2 PMC Connector JN1 Pinout PMC ConnectorsPMC Connector JN2 PMC Connector JN4 Non-standard PMC Connector JN5 PEM 1 Connector Pinout PEM ConnectorsPEM 2 Connector Pinout Jtag in Connector Pinout Jtag ConnectorsJtag OUT Connector Connector Pinouts SCV64 Register Initialization Appendix a SCV64 Register Values SCV64 Register Initialization VME IndexInterrupts to node A, 40 register Reset Jtag Sysreset