Spectrum Brands C6x VME64 manual Inter-processor Interrupts, VME Host Interrupts To Any Node

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Monaco Technical Reference

Spectrum Signal Processing

Interrupt Handling

8.8.Inter-processor Interrupts

The Inter-processor interrupts (VINTx) are shared with the SCV interrupt. They allow any processor to interrupt any other processor through the VINTx registers. There are four of these registers; one for each of the processors.

To generate an interrupt to a particular processor, a “1” is written to bit D0 of the VINT register corresponding to the processor to be interrupted. These registers are accessible from any of the four processors. Node C, for example, can interrupt node B by writing “1” to the VINTB Register (address 016D 8008h).

The VSTATUS Register (address 016D 8000h) also indicates that a node has a pending interrupt whenever any of the following bits is set to “1”:

Bit	Interrupted Node
D8	Node A
D9	Node B
D10	Node C
D11	Node D

A processor clears an interrupt by clearing its corresponding bit VINTx register. In the case where node C interrupts node B, for example, node B would clear the interrupt by writing “0” to the VINTB Register (address 016D 8008h).

8.9.VME Host Interrupts To Any Node

A VME host can interrupt a particular node on the Monaco board using DSPINT in the HPIC register of the Host Port Interface (HPI). Refer to the TMS320C6x documentation for further information on using DSPINT.

44	Part Number 500-00191
	Revision 2.00

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Contents Monaco Revision Preface IiiHistory Document Rev Date ChangesChange Table of Contents Monaco Technical Reference Vii Viii List of Figures Table of Contents List of Tables Xii Product Operation Processors FeaturesIntroduction Interfaces VMEPMC PEMReference Documents On-Board Power Supply General Bus ArchitectureReset Conditions VME A24 Slave Interface ResetJtag Reset SysresetBoard Layout Board LayoutOUT Jumper settingsJumper Settings Description Part Number Processor Configurations Populated Processor NodesProcessor Node Block Diagram External Memory Processor Memory ConfigurationInternal Memory 0x0180 DSP Memory Map Address Nodes B, C, and DSynchronous Burst Sram Synchronous DramProcessor Expansion Module Host PortProcessor Booting Processor Boot Source Jumpers NodeSerial Port Routing Serial Port RoutingPEM Connections for Serial Port 0 VME and PMC Connections for Serial PortGlobal Shared Bus Access Source Target Global Shared BusMemory ArbitrationSingle Cycle Bus Access Burst Cycle Bus AccessLocked Cycles Global Shared Bus SCV64 Primary Slave A32/A24 Interface VME64 Bus InterfaceVME Operation Access A24 Secondary Slave InterfaceA24 Secondary Interface Memory Map HPI Register Addresses VME address HpiaMaster A32/A24/A16 SCV64 Interface VME64 Bus Interface DSP~LINK3 Interface DSP~LINK3 Data Transfer Operating ModesAddress Strobe Control Mode AstrbenInterface Signals DSP~LINK3 ResetDSP~LINK3 Interface PCI Offset Address Hurricane ConfigurationPCI Interface Hurricane Register Set Value InitializeBCC2A Hurricane Implementation PCI DeviceJtag Debugging Jtag ChainJtag Debugging Interrupt Handling OverviewDSP~LINK3 Interrupts to Node a Interrupt RoutingPEM Interrupts PCI Bus InterruptsHurricane Interrupt SCV64 InterruptKipl Status Bits and the Iack Cycle KIPL2 KIPL1 KIPL0Bus Error Interrupts Bit Node Whose Access Caused the Bus ErrorInter-processor Interrupts VME Host Interrupts To Any NodeRegister Address Summary Access Privilege Bus RegistersVpage Register KFC2..0 KSIZE1..0 KADDR1..0Vstatus Register KIPL2..0 BuserraKavec Vinta Register Vintb Register Vintc Register Vintd Register Kipl Enable Register KiplendKiplenc KiplenbDL3RESET DSP~LINK3 RegisterID Register VME A24 Status Register HintaHintb HintcVME A24 Control Register Registers Specifications Board IdentificationMonaco Monaco67Specifications Parameter GeneralData Access/Transfer Performance Performance and Data ThroughputSpecifications Connector Pinouts Connector LayoutVME Connectors VME P1 Connector PinoutVME P2 Connector Pinout PMC to VME P2 VME P2 Connector DSP~LINK3 to VME P2 PMC Connectors PMC Connector JN1 PinoutPMC Connector JN2 PMC Connector JN4 Non-standard PMC Connector JN5 PEM Connectors PEM 1 Connector PinoutPEM 2 Connector Pinout Jtag OUT Connector Jtag ConnectorsJtag in Connector Pinout Connector Pinouts Appendix a SCV64 Register Values SCV64 Register InitializationSCV64 Register Initialization Index VMEInterrupts to node A, 40 register Reset Jtag Sysreset