Intel 31154 manual

Contents

Main 2Intel 31154 133 MHz PCI Bridge Design Guide Contents Figures Tables Page Page Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 7 About This Document About This Document 1 1.1 Terminology and Definitions Table 1. Terminology and Definition (Sh eet 1 of 2) About This Document Table 1. Terminology and Definition (Sheet 2 of 2) Introduction 2 2.1 Product Overview 2.2 Features List 2.3 Related External Specifications 2.4 References Page Package Information 3 14 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide Figure 2. Intel 31154 133 MHz PCI Bridge Package Notes: DETAIL "A" NOT TO SCALE Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 15 Figure 3. Intel 31154 133 MHz PCI Bridge Ball MapTop View, Left Side NC 16 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide Figure 4. Intel 31154 133 MHz PCI Bridge Ball MapTop View, Right Side 13 14 15 16 17 18 19 20 21 22 23 3.1 Total Signal Count Page Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 19 Terminations 4 20 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide Table 5. Pull-Up/Pull-Down Terminations (Sheet 2 of 9) Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 21 Table 5. Pull-Up/Pull-Down Terminations (Sheet 3 of 9) 22 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide Table 5. Pull-Up/Pull-Down Terminations (Sheet 4 of 9) Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 23 Table 5. Pull-Up/Pull-Down Terminations (Sheet 5 of 9) 24 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide Table 5. Pull-Up/Pull-Down Terminations (Sheet 6 of 9) Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 25 Table 5. Pull-Up/Pull-Down Terminations (Sheet 7 of 9) 26 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide Table 5. Pull-Up/Pull-Down Terminations (Sheet 8 of 9) Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 27 Table 5. Pull-Up/Pull-Down Terminations (Sheet 9 of 9) Page PCI/PCI-X Interface 5 5.1 PCI/PCI-X Voltage Levels 5.2 Interrupt Routing 5.3 IDSEL Lines 5.3.1 Primary IDSEL Line 5.3.2 Secondary IDSEL Lines 5.3.3 Secondary IDSEL Masking 5.3.4 Secondary Clock Control 5.4 CompactPCI* Hot Swap Mode Select 5.5 Opaque Memory Region Enable 5.6 PCI-X Initialization Clocking Modes 5.6.1 Primary PCI Clocking Mode 5.6.2 Secondary PCI Clocking Mode Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 33 PCI/PCI-X Interface Table 8. PCI-X Clocking Modes Table 9. Secondary Bus Frequency Initialization 5.6.3 Primary-to-Secondary Frequency Limits Routing Guidelines 6 6.1 Crosstalk 6.2 EMI Considerations 6.3 Power Distribution and Decoupling 6.3.1 Decoupling Recommendations 6.4 Trace Impedance Page PCI-X Layout Guidelines 7 7.1 PCI Clock Layout Guidelines Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 43 Figure 8. PCI Clock Distribution and Matching Requirements Intel 31154 133 MHz PCI Bridge 7.2 PCI-X Topology Layout Guidelines 7.2.1 Single Slot at 133 MHz 7.2.1.1 Intel 31154 133MHz PCI Bridge Embedded Application at 133 MHz 7.2.2 Dual-Slot at 100 MHz 7.2.2.1 Embedded Intel 31154 133MHz PCI Bridge Application at 100 MHz 7.2.3 Quad-Slots at 66 MH z 50 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide Table 18. Wiring Lengths for 66 MHz Quad-Slot (Sheet 2 of 2) Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 51 7.2.3.1 Embedded Intel 31154 133MHz PCI Bridge Application at 66 MHz Table 19. Wiring Lengths for Embedded 66 MHz Design 7.2.4 PCI-X at 33 MHz 7.2.4.1 Embedded PCI-X Specification PICMG 1.2 Overview 7.2.4.2 PICMG 1.2 System Overview Page 54 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide Figure 16. PCI-X Data Bus PICMG 1.2 Style Backplane Backplane Table 20. Wiring Lengths for PICMG 1.2 Backplane Page Page Power Considerations 8 8.1 Analog Power Pins 8.2 Power Sequencing Intel 133 MHz PCI Bridge Customer Reference Board 9 Intel 31154 133 MHz PCI Bridge Page Debug Connectors and Logic Analyzer Connectivity 10 10.1 Probing PCI-X Signals 62 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide Table 23. Logic An alyzer Pod 1 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 63 Table 24. Logic Analyzer Pod 2 64 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide Table 25. Logic An alyzer Pod 3 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide 65 Table 26. Logic Analyzer Pod 4 66 Intel 31154 133 MHz PCI Bridge Design Guide Design Guide Table 27. Logic An alyzer Pod 5 Page Page Thermal Solutions 11 Page References 12 12.1 Related Documents