Intel 31154 manual Pull-Up/Pull-Down Terminations Sheet 9 of, Signal, Comments

Models: 31154

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Pull-Up/Pull-Down Terminations (Sheet 9 of 9)

 

 

 

Terminations

Table 5.

Pull-Up/Pull-Down Terminations (Sheet 9 of 9)

 

 

 

 

Signal

 

Pull-Up/Pull-Down or Termination (See Note 1)

Comments

 

 

 

 

 

 

• When forced retirement of the 31154 internal

• As soon as NT_MASK# is asserted, it must

 

 

request queues and data buffer is not desired

 

 

in the application, this pin must be pulled up to

not be de-asserted until the QE pin is

 

 

3.3 V through an 8.2 Kresistor.

asserted.

NT_MASK#

 

• When forced retirement of the 31154 internal

• NT_MASK# must not be reasserted until the

 

request queues and data buffer is desired in

QE pin is cleared.

 

 

 

 

the application, this pin must be connected to

• Setting the New Transaction Mask bit to 1b in

 

 

external logic (or using the GPIO of the 31154)

VCR0 has the same effect as asserting

 

 

that drives this pin low when masking new

NT_MASK#.

 

 

transactions is desired.

 

 

 

 

 

 

 

Connection depends on application. This is an

NOTE: The state of this output is valid only when

 

 

output signal that indicates the state of the 31154

the NT_MASK# pin is asserted.

QE

 

internal request and data queues. When high, this

 

 

 

signal indicates that the 31154 internal queues are

 

 

 

completely empty.

 

 

 

 

 

SCAN_EN

 

For normal operation, tie low to GND.

 

 

 

 

 

 

 

For normal operation, tie to 0000 or 0111.

 

TMODE[3:0]

 

0 = Pull low to GND.

 

 

1 = Pull high to 3.3 V through an external 8.2 K

 

 

 

 

 

 

resistor.

 

 

 

 

 

NOTES:

1.The recommended value for pull-up resistors for PCI applications is 5.6 K(note that the minimum value for PCI 3.3 V signaling RMIN = 2.42 K, RTYP = 8.2 K, as per the PCI Local Bus Specification, Revision 2.3, section 4.3.3).

2.The recommended value for pull-up resistors for PCI-X applications is 8.2 K. For PCI-X, the minimum pull-up resistor value is 5 K, as per the PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0b, section 9.7.

3.For plug-in card implementations, the pull-up must be on the motherboard.

4.Connect PVIO and SVIO pull-up resistors to 5 V or 3.3 V power supply through an external resistor—25 (5 V) or

0 (3.3 V), depending on the signaling level of the primary/secondary PCI bus. Refer to the power-sequencing guidelines in Section 8.2 on page 58.

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Intel® 31154 133 MHz PCI Bridge Design Guide Design Guide

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Page 27
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Intel manual Pull-Up/Pull-Down Terminations Sheet 9 of, Intel 31154 133 MHz PCI Bridge Design Guide Design Guide, Signal